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From: "Radim Krčmář" <rkrcmar@ventanamicro.com>
To: "Deepak Gupta" <debug@rivosinc.com>
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
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	"Zong Li" <zong.li@sifive.com>,
	"linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Subject: Re: [PATCH v12 05/28] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit
Date: Fri, 25 Apr 2025 13:32:00 +0200	[thread overview]
Message-ID: <D9FOQ0C9HMIR.17FERF6F7C8LR@ventanamicro.com> (raw)
In-Reply-To: <aAp9D7txw8y9WL5m@debug.ba.rivosinc.com>

2025-04-24T11:03:59-07:00, Deepak Gupta <debug@rivosinc.com>:
> On Thu, Apr 24, 2025 at 02:16:32PM +0200, Radim Krčmář wrote:
>>2025-04-23T17:23:56-07:00, Deepak Gupta <debug@rivosinc.com>:
>>> On Thu, Apr 10, 2025 at 01:04:39PM +0200, Radim Krčmář wrote:
>>>>2025-03-14T14:39:24-07:00, Deepak Gupta <debug@rivosinc.com>:
>>>>> diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
>>>>> @@ -147,6 +147,20 @@ SYM_CODE_START(handle_exception)
>>>>>
>>>>>  	REG_L s0, TASK_TI_USER_SP(tp)
>>>>>  	csrrc s1, CSR_STATUS, t0
>>>>> +	/*
>>>>> +	 * If previous mode was U, capture shadow stack pointer and save it away
>>>>> +	 * Zero CSR_SSP at the same time for sanitization.
>>>>> +	 */
>>>>> +	ALTERNATIVE("nop; nop; nop; nop",
>>>>> +				__stringify(			\
>>>>> +				andi s2, s1, SR_SPP;	\
>>>>> +				bnez s2, skip_ssp_save;	\
>>>>> +				csrrw s2, CSR_SSP, x0;	\
>>>>> +				REG_S s2, TASK_TI_USER_SSP(tp); \
>>>>> +				skip_ssp_save:),
>>>>> +				0,
>>>>> +				RISCV_ISA_EXT_ZICFISS,
>>>>> +				CONFIG_RISCV_USER_CFI)
>>>>
>>>>(I'd prefer this closer to the user_sp and kernel_sp swap, it's breaking
>>>> the flow here.  We also already know if we've returned from userspace
>>>> or not even without SR_SPP, but reusing the information might tangle
>>>> the logic.)
>>>
>>> If CSR_SCRATCH was 0, then we would be coming from kernel else flow goes
>>> to `.Lsave_context`. If we were coming from kernel mode, then eventually
>>> flow merges to `.Lsave_context`.
>>>
>>> So we will be saving CSR_SSP on all kernel -- > kernel trap handling. That
>>> would be unnecessary. IIRC, this was one of the first review comments in
>>> early RFC series of these patch series (to not touch CSR_SSP un-necessarily)
>>>
>>> We can avoid that by ensuring when we branch by determining if we are coming
>>> from user to something like `.Lsave_ssp` which eventually merges into
>>> ".Lsave_context". And if we were coming from kernel then we would branch to
>>> `.Lsave_context` and thus skipping ssp save logic. But # of branches it
>>> introduces in early exception handling is equivalent to what current patches
>>> do. So I don't see any value in doing that.
>>>
>>> Let me know if I am missing something.
>>
>>Right, it's hard to avoid the extra branches.
>>
>>I think we could modify the entry point (STVEC), so we start at
>>different paths based on kernel/userspace trap and only jump once to the
>>common code, like:
>>
>>  SYM_CODE_START(handle_exception_kernel)
>>    /* kernel setup magic */
>>    j handle_exception_common
>>  SYM_CODE_START(handle_exception_user)
>>    /* userspace setup magic */
>>  handle_exception_common:
>
> Hmm... This can be done. But then it would require to constantly modify `stvec`
> When you're going back to user mode, you would have to write `stvec` with addr
> of `handle_exception_user`.

We'd just be writing STVEC instead of SSCRATCH, probably at the very
same places.
It's possible that some micro-architectures will be disturbed more by
writing STVEC than SSCRATCH, though, so it's not an easy change to make.

>                             But then you can easily get a NMI. It can become
> ugly. Needs much more thought and on first glance feels error prone.

Yeah, the M-mode Linux adds a lot of fun.  I don't see support for the
Smrnmi extension, so unlucky NMIs should be fatal even now.


  reply	other threads:[~2025-04-25 11:32 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-14 21:39 [PATCH v12 00/28] riscv control-flow integrity for usermode Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 01/28] mm: VM_SHADOW_STACK definition for riscv Deepak Gupta
2025-04-07 15:45   ` Alexandre Ghiti
2025-03-14 21:39 ` [PATCH v12 02/28] dt-bindings: riscv: zicfilp and zicfiss in dt-bindings (extensions.yaml) Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 03/28] riscv: zicfiss / zicfilp enumeration Deepak Gupta
2025-04-07 15:48   ` Alexandre Ghiti
2025-04-09 14:43     ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 04/28] riscv: zicfiss / zicfilp extension csr and bit definitions Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 05/28] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit Deepak Gupta
2025-04-08  8:05   ` Alexandre Ghiti
2025-04-10 11:04   ` Radim Krčmář
2025-04-24  0:00     ` Deepak Gupta
2025-04-24 11:52       ` Radim Krčmář
2025-04-24 17:56         ` Deepak Gupta
2025-04-25 11:27           ` Radim Krčmář
2025-04-24  0:23     ` Deepak Gupta
2025-04-24 12:16       ` Radim Krčmář
2025-04-24 18:03         ` Deepak Gupta
2025-04-25 11:32           ` Radim Krčmář [this message]
2025-03-14 21:39 ` [PATCH v12 06/28] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE Deepak Gupta
2025-04-08 10:39   ` Alexandre Ghiti
2025-04-10 10:03   ` Radim Krčmář
2025-04-24  0:45     ` Deepak Gupta
2025-04-24 12:23       ` Radim Krčmář
2025-04-24 12:43         ` Arnd Bergmann
2025-03-14 21:39 ` [PATCH v12 07/28] riscv mm: manufacture shadow stack pte Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 08/28] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 09/28] riscv mmu: write protect and shadow stack Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 10/28] riscv/mm: Implement map_shadow_stack() syscall Deepak Gupta
2025-04-07  4:50   ` Zong Li
2025-04-09 14:19     ` Deepak Gupta
2025-04-10  9:56   ` Radim Krčmář
2025-04-24  3:16     ` Deepak Gupta
2025-04-24 12:51       ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 11/28] riscv/shstk: If needed allocate a new shadow stack on clone Deepak Gupta
2025-04-08 10:51   ` Alexandre Ghiti
2025-04-09 14:31     ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 12/28] riscv: Implements arch agnostic shadow stack prctls Deepak Gupta
2025-03-17  1:29   ` Zong Li
2025-04-10  9:45   ` Radim Krčmář
2025-04-24  4:44     ` Deepak Gupta
2025-04-24 13:36       ` Radim Krčmář
2025-04-24 18:16         ` Deepak Gupta
2025-04-25 11:42           ` Radim Krčmář
2025-04-25 16:39             ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 13/28] prctl: arch-agnostic prctl for indirect branch tracking Deepak Gupta
2025-03-17  1:29   ` Zong Li
2025-04-09  8:03   ` Alexandre Ghiti
2025-04-09 14:26     ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 14/28] riscv: Implements arch agnostic indirect branch tracking prctls Deepak Gupta
2025-03-17  1:29   ` Zong Li
2025-03-14 21:39 ` [PATCH v12 15/28] riscv/traps: Introduce software check exception Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 16/28] riscv: signal: abstract header saving for setup_sigcontext Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 17/28] riscv/signal: save and restore of shadow stack for signal Deepak Gupta
2025-04-10  8:49   ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 18/28] riscv/kernel: update __show_regs to print shadow stack register Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 19/28] riscv/ptrace: riscv cfi status and state via ptrace and in core files Deepak Gupta
2025-03-20 22:24   ` Radim Krčmář
2025-03-20 23:09     ` Deepak Gupta
2025-03-21  7:22       ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 20/28] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 21/28] riscv: Add Firmware Feature SBI extensions definitions Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 22/28] riscv: enable kernel access to shadow stack memory via FWFT sbi call Deepak Gupta
2025-03-20 22:10   ` Radim Krčmář
2025-03-20 22:42     ` Deepak Gupta
2025-03-21  7:35       ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 23/28] riscv: kernel command line option to opt out of user cfi Deepak Gupta
2025-03-20 21:35   ` Radim Krčmář
2025-03-20 22:31     ` Deepak Gupta
2025-03-21  7:31       ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 24/28] arch/riscv: compile vdso with landing pad Deepak Gupta
2025-04-08 12:45   ` Alexandre Ghiti
2025-04-09 14:28     ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 25/28] riscv: create a config for shadow stack and landing pad instr support Deepak Gupta
2025-03-20 21:25   ` Radim Krčmář
2025-03-20 22:29     ` Deepak Gupta
2025-03-21  7:51       ` Radim Krčmář
2025-03-14 21:39 ` [PATCH v12 26/28] riscv: Documentation for landing pad / indirect branch tracking Deepak Gupta
2025-04-08  8:36   ` Alexandre Ghiti
2025-03-14 21:39 ` [PATCH v12 27/28] riscv: Documentation for shadow stack on riscv Deepak Gupta
2025-04-08  8:48   ` Alexandre Ghiti
2025-04-10  5:24     ` Deepak Gupta
2025-03-14 21:39 ` [PATCH v12 28/28] kselftest/riscv: kselftest for user mode cfi Deepak Gupta

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