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[209.85.220.65]) by mx.google.com with SMTPS id d133sor458313oif.35.2019.06.20.16.13.16 for (Google Transport Security); Thu, 20 Jun 2019 16:13:16 -0700 (PDT) Received-SPF: pass (google.com: domain of dan.j.williams@intel.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@intel-com.20150623.gappssmtp.com header.s=20150623 header.b="wZXK/rGx"; spf=pass (google.com: domain of dan.j.williams@intel.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=dan.j.williams@intel.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=s1U8b9i28hLJayWU6+c6YVAvl2Rop3SMymokvtyzh0o=; b=wZXK/rGx3xr+u7oi//RllS+oGNo9Tzry/ML+vUVpgS/Zv+UVNj64dDUV96UYUd1Jn3 HTEz2HrWATyMseQ9ESDNMngt9dsb1UfHOlUe8zE/5wDSyS1AVE4ZRpittyrzTTchLos5 4eYsM6eY6GbydQyeJ5021LQYq2W4FXOMsUpMRrhldyeNx0gkDVyn8cVP0JPDGRXYNHA0 Khcxwe9CepLmmm4wC6aJwDUSLxUAkLS7QB/OjbTbUQGW9ZgOSJMHsxAIyonm6fZ1Gisx DP1+rtOY4WuxwcsaUVn8PkaGb7RTOOyiGjDW9YizTilPtgcvoQvLQUcgY/Zjj7YawYJt OuAg== X-Google-Smtp-Source: APXvYqxf0VmRIyLU90bg8tJ1rHATTJ0aCa2jorETk2j+MQarpeuMzOl/bF99+OKywGM9BxnPQWWwQHFQhni6/xxki/w= X-Received: by 2002:aca:fc50:: with SMTP id a77mr917887oii.0.1561072395816; Thu, 20 Jun 2019 16:13:15 -0700 (PDT) MIME-Version: 1.0 References: <20190613045903.4922-1-namit@vmware.com> <20190613045903.4922-4-namit@vmware.com> <20190617215750.8e46ae846c09cd5c1f22fdf9@linux-foundation.org> <98464609-8F5A-47B9-A64E-2F67809737AD@vmware.com> <8072D878-BBF2-47E4-B4C9-190F379F6221@vmware.com> <8736k49c57.fsf@firstfloor.org> In-Reply-To: <8736k49c57.fsf@firstfloor.org> From: Dan Williams Date: Thu, 20 Jun 2019 16:13:04 -0700 Message-ID: Subject: Re: [PATCH 3/3] resource: Introduce resource cache To: Andi Kleen Cc: Bjorn Helgaas , Nadav Amit , Andrew Morton , LKML , Linux-MM , Borislav Petkov , Toshi Kani , Peter Zijlstra , Dave Hansen , Ingo Molnar , "Kleen, Andi" Content-Type: text/plain; charset="UTF-8" X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Thu, Jun 20, 2019 at 2:31 PM Andi Kleen wrote: > > Dan Williams writes: > > > > The underlying issue is that the x86-PAT implementation wants to > > ensure that conflicting mappings are not set up for the same physical > > address. This is mentioned in the developer manuals as problematic on > > some cpus. Andi, is lookup_memtype() and track_pfn_insert() still > > relevant? > > There have been discussions about it in the past, and the right answer > will likely differ for different CPUs: But so far the official answer > for Intel CPUs is that these caching conflicts should be avoided. > Ok. > So I guess the cache in the original email makes sense for now. I wouldn't go that far, but it does mean that if we go ahead with caching the value as a dax_device property there should at least be a debug option to assert that the device value conforms to all the other mappings. Another failing of the track_pfn_insert() and lookup_memtype() implementation is that it makes it awkward to handle marking mappings UC to prevent speculative consumption of poison. That is something that is better handled, in my opinion, by asking the device for the pgprot and coordinating shooting down any WB mappings of the same physical page.