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[209.85.220.65]) by mx.google.com with SMTPS id s19sor2473736ois.68.2019.03.20.20.12.46 for (Google Transport Security); Wed, 20 Mar 2019 20:12:46 -0700 (PDT) Received-SPF: pass (google.com: domain of dan.j.williams@intel.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@intel-com.20150623.gappssmtp.com header.s=20150623 header.b=O8Sexf3a; spf=pass (google.com: domain of dan.j.williams@intel.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=dan.j.williams@intel.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=hNRCxCN0CPAwwEtkaOPrHmrtVKrkPJRIrqfUj9WvgyM=; b=O8Sexf3atM7lpmy9ftmXKY6Rq98VWw6kJJHp0jYrLWOxjKwD7nE0qEKAHLQw6tCuKX CM3Nvb9Wm0GwBB9S3f2lVuH2umS5O6KixZnJsQyPudc/BqA0kVTOWcwRgBy1XKC0eBiR 7gsbJROskxVR1QLdM0WLyxbmhIJNcahTso9WIpLFOAEnIk9FmrLxfXAUzdcWujrcRaks NApVOGxVkBqnNBpIXs+AdbmuKY/PCohhzkgNnFYt893m1QMRVT0cf+FGjN/q9omQ7D0c lRSZuUG8JgbCDVde+5KpKNZ/v/wMiSE5W4hsCzH/hGCaCBNP6w/5MQyi1tNi/IJipRVH ysDA== X-Google-Smtp-Source: APXvYqylwiscCu6ZjtkuX8ZDMdHYFpCCnDQq/QDcOH9L7ss0xpeIBR+ZWTttEz8AazBy4cqY+C3YbuRNm+DG7x8rkms= X-Received: by 2002:aca:ed88:: with SMTP id l130mr798985oih.70.1553137965862; Wed, 20 Mar 2019 20:12:45 -0700 (PDT) MIME-Version: 1.0 References: <20190228083522.8189-1-aneesh.kumar@linux.ibm.com> <20190228083522.8189-2-aneesh.kumar@linux.ibm.com> <87k1hc8iqa.fsf@linux.ibm.com> <871s3aqfup.fsf@linux.ibm.com> <87bm267ywc.fsf@linux.ibm.com> <878sxa7ys5.fsf@linux.ibm.com> In-Reply-To: From: Dan Williams Date: Wed, 20 Mar 2019 20:12:34 -0700 Message-ID: Subject: Re: [PATCH 2/2] mm/dax: Don't enable huge dax mapping by default To: Oliver Cc: "Aneesh Kumar K.V" , Jan Kara , linux-nvdimm , Michael Ellerman , Linux Kernel Mailing List , Linux MM , Ross Zwisler , Andrew Morton , linuxppc-dev , "Kirill A . Shutemov" Content-Type: text/plain; charset="UTF-8" X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Wed, Mar 20, 2019 at 8:09 PM Oliver wrote: > > On Thu, Mar 21, 2019 at 7:57 AM Dan Williams wrote: > > > > On Wed, Mar 20, 2019 at 8:34 AM Dan Williams wrote: > > > > > > On Wed, Mar 20, 2019 at 1:09 AM Aneesh Kumar K.V > > > wrote: > > > > > > > > Aneesh Kumar K.V writes: > > > > > > > > > Dan Williams writes: > > > > > > > > > >> > > > > >>> Now what will be page size used for mapping vmemmap? > > > > >> > > > > >> That's up to the architecture's vmemmap_populate() implementation. > > > > >> > > > > >>> Architectures > > > > >>> possibly will use PMD_SIZE mapping if supported for vmemmap. Now a > > > > >>> device-dax with struct page in the device will have pfn reserve area aligned > > > > >>> to PAGE_SIZE with the above example? We can't map that using > > > > >>> PMD_SIZE page size? > > > > >> > > > > >> IIUC, that's a different alignment. Currently that's handled by > > > > >> padding the reservation area up to a section (128MB on x86) boundary, > > > > >> but I'm working on patches to allow sub-section sized ranges to be > > > > >> mapped. > > > > > > > > > > I am missing something w.r.t code. The below code align that using nd_pfn->align > > > > > > > > > > if (nd_pfn->mode == PFN_MODE_PMEM) { > > > > > unsigned long memmap_size; > > > > > > > > > > /* > > > > > * vmemmap_populate_hugepages() allocates the memmap array in > > > > > * HPAGE_SIZE chunks. > > > > > */ > > > > > memmap_size = ALIGN(64 * npfns, HPAGE_SIZE); > > > > > offset = ALIGN(start + SZ_8K + memmap_size + dax_label_reserve, > > > > > nd_pfn->align) - start; > > > > > } > > > > > > > > > > IIUC that is finding the offset where to put vmemmap start. And that has > > > > > to be aligned to the page size with which we may end up mapping vmemmap > > > > > area right? > > > > > > Right, that's the physical offset of where the vmemmap ends, and the > > > memory to be mapped begins. > > > > > > > > Yes we find the npfns by aligning up using PAGES_PER_SECTION. But that > > > > > is to compute howmany pfns we should map for this pfn dev right? > > > > > > > > > > > > > Also i guess those 4K assumptions there is wrong? > > > > > > Yes, I think to support non-4K-PAGE_SIZE systems the 'pfn' metadata > > > needs to be revved and the PAGE_SIZE needs to be recorded in the > > > info-block. > > > > How often does a system change page-size. Is it fixed or do > > environment change it from one boot to the next? I'm thinking through > > the behavior of what do when the recorded PAGE_SIZE in the info-block > > does not match the current system page size. The simplest option is to > > just fail the device and require it to be reconfigured. Is that > > acceptable? > > The kernel page size is set at build time and as far as I know every > distro configures their ppc64(le) kernel for 64K. I've used 4K kernels > a few times in the past to debug PAGE_SIZE dependent problems, but I'd > be surprised if anyone is using 4K in production. Ah, ok. > Anyway, my view is that using 4K here isn't really a problem since > it's just the accounting unit of the pfn superblock format. The kernel > reading form it should understand that and scale it to whatever > accounting unit it wants to use internally. Currently we don't so that > should probably be fixed, but that doesn't seem to cause any real > issues. As far as I can tell the only user of npfns in > __nvdimm_setup_pfn() whih prints the "number of pfns truncated" > message. > > Am I missing something? No, I don't think so. The only time it would break is if a system with 64K page size laid down an info-block with not enough reserved capacity when the page-size is 4K (npfns too small). However, that sounds like an exceptional case which is why no problems have been reported to date.