From: Wenchao Hao <haowenchao22@gmail.com>
To: "David Hildenbrand (Arm)" <david@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>,
Lorenzo Stoakes <lorenzo.stoakes@oracle.com>,
"Liam R . Howlett" <Liam.Howlett@oracle.com>,
Vlastimil Babka <vbabka@suse.cz>,
Mike Rapoport <rppt@kernel.org>,
Suren Baghdasaryan <surenb@google.com>,
Michal Hocko <mhocko@suse.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH] mm: only set fault addrsss' access bit in do_anonymous_page
Date: Wed, 11 Feb 2026 08:49:37 +0800 [thread overview]
Message-ID: <CAOptpSPuntL5dy+D7-wWcWuOgxugD+_uLzEO8e4fyGjS_ZkUWQ@mail.gmail.com> (raw)
In-Reply-To: <5c4d773c-e3e7-4a71-b250-91701cbdd4a2@kernel.org>
On Tue, Feb 10, 2026 at 5:07 PM David Hildenbrand (Arm)
<david@kernel.org> wrote:
>
> On 2/10/26 05:34, Wenchao Hao wrote:
> > When do_anonymous_page() creates mappings for huge pages, it currently sets
> > the access bit for all mapped PTEs (Page Table Entries) by default.
> >
> > This causes an issue where the Referenced field in /proc/pid/smaps cannot
> > distinguish whether a page was actually accessed.
>
> What is the use case that cares about that?
>
We have enabled 64KB large folios on Android devices, which may introduce
some memory waste. I want to figure out the proportion of memory waste
caused by large folios. Reading the "Referenced" field from /proc/pid/smaps
is a relatively low-cost method.
Additionally, considering future hot/cold page identification, we aim to
detect 64KB large folios where some pages are actually unaccessed and split
them into normal pages to avoid memory waste.
However, the current large folio implementation sets the access bit for all
page table entries (PTEs) of the large folio in the do_anonymous_page
function, making it hard to distinguish whether pre-allocated pages were
truly accessed.
> What we have right now is the exact same behavior as if you would get a
> PMD THP that has a single access+dirty bit at fault time.
>
> Also, architectures that support transparent PTE coalescing will not be
> able to coalesce until all PTE bits are equal.
>
> This level of imprecision is to be expected with large folios that only
> have a single access+dirty bit.
>
Thanks a lot for the response.
I saw this description in the ARM manual, “D8.5.5 Use of the Contiguous bit
with hardware updates to the translation tables”:
> If hardware updates a translation table entry, and if the Contiguous bit in
> that entry is 1, then the members in a group of contiguous translation table
> entries can have different AF, AP[2], and S2AP[1] values.
Does this mean that after hardware aggregates multiple PTEs, it can still
independently set the AF and other flag bits corresponding to specific
sub-PTE?
If so, can software also set different AF bits for a group of 16 PTEs
without affecting the transparent PTE coalescing function?
The reason I have this confusion is that there is such a description in
“D8.7.1 The Contiguous bit:”
> Software is required to ensure that all of the adjacent translation table
> entries for the contiguous region point to a contiguous OA range with
> consistent attributes and permissions.
It does not specify whether attributes and permissions include the AF bit.
> --
> Cheers,
>
> David
next prev parent reply other threads:[~2026-02-11 0:49 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-10 4:34 Wenchao Hao
2026-02-10 9:07 ` David Hildenbrand (Arm)
2026-02-11 0:49 ` Wenchao Hao [this message]
2026-02-11 4:18 ` Dev Jain
2026-02-12 1:42 ` Wenchao Hao
2026-02-12 5:04 ` Dev Jain
2026-02-11 9:05 ` David Hildenbrand (Arm)
2026-02-12 1:57 ` Wenchao Hao
2026-02-12 8:54 ` David Hildenbrand (Arm)
2026-02-13 9:02 ` Wenchao Hao
2026-02-13 9:07 ` David Hildenbrand (Arm)
2026-02-13 14:52 ` Wenchao Hao
2026-02-13 15:08 ` David Hildenbrand (Arm)
2026-02-10 11:56 ` Kiryl Shutsemau
2026-02-11 1:00 ` Wenchao Hao
2026-02-11 11:03 ` Kiryl Shutsemau
2026-02-12 2:08 ` Wenchao Hao
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