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Mon, 03 Jul 2023 22:42:46 -0700 (PDT) MIME-Version: 1.0 References: <20230703135330.1865927-1-ryan.roberts@arm.com> <20230703135330.1865927-4-ryan.roberts@arm.com> <4f86fa34-11d0-8a11-5adf-d099fc9e46b8@intel.com> In-Reply-To: <4f86fa34-11d0-8a11-5adf-d099fc9e46b8@intel.com> From: Yu Zhao Date: Mon, 3 Jul 2023 23:42:10 -0600 Message-ID: Subject: Re: [PATCH v2 3/5] mm: Default implementation of arch_wants_pte_order() To: "Yin, Fengwei" Cc: Ryan Roberts , Andrew Morton , Matthew Wilcox , "Kirill A. Shutemov" , David Hildenbrand , Catalin Marinas , Will Deacon , Anshuman Khandual , Yang Shi , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Rspamd-Queue-Id: 9DAAE80005 X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: p115rruexzkkzzzbiat6du1ndgzc5sqo X-HE-Tag: 1688449367-471849 X-HE-Meta: U2FsdGVkX1/NRunJquOqqwPI1cIbKQZKpsA5ym1lxvCCotqYZW1eilxDNz/JrKHb4extW3POaioWllRUw7yAPAvG6hp/KvEm7GysjMlg0+2j3Lcj4CVU38ZHrriw4C60kfZ+j4MHw435t47SFbiwosIsXEQkX2vX4OEUe09UPp2QafndJQEnJd3FpAxF0QogWxEwgSzH3HOmw1Kxol/gnRrjORSpAWIENBxxrpELGAst/30ySycbltUfCLUXrrQ8bmYIeJMZA65mFSLye1JuwCwrQ8CJWjHWFQ+3oQTV+QaYHI2bMzt0XLMhGFESkk/E/2MGshHxQiY6MxiypYtNnM3hi40nclUHdKrYt56L+IvCWT4368htN7MXzf2ZiAvezkwUsLgvFlCEaD6hWp0qcq4CsfWHKEWf/E22Ec+RoRNUALNrovr7Qxi58qxEPngq/9f0oBE5XWGCN/SciFC+oo9bpdtRqwY0JddaA3+1A4NNj/YsGJCnqUXjYp2mNLBra9/FWVR4KHWGOUYGJrBjZxc4mkhsjEXdhUm/nOOcSUWxnV5bRGp8qO2JOlua/f4+S3//UhXaiwPuUpSQlTn08z1FWeizvv5f/TjyZBYbga03NVnkTeNOlqmlH1fCPdWKWm/RLPzeaSvkxjQg08WdOA0JqEkh2sMx8Gwry4mJGvEz33yYoBa+2vGx5AJ6YVtDr0hL1pgR036UixigC6Im8ls/zOmhsNj9pZ7kcoY4YhUn65hCN4gfmZSnzw4OFA5bdIB9EffF3wlzIvbwxeZ23GSM90V0gWo/FamXMF1JI6UzV7Dfip6QxixDD1stY/lKcmmz0HuTEGT+q1MdqojBpEeyWsyOo+G3qSqbMloXGaI2UtU4C702NY3IPjiG0OALRpc3s4OU6pvb1tdt/e30VfVvNo/CGh3VL4y5AKjF8eX2LSDLaR9wSriGYnxoV+EJ4qw0mI/zQDPZpjQ/Ekq 3Dud1B2y Emt2rVDJvB0v4H8Bp8PfyENo45K2NJDHC0RO7Hezl1Q9XjuOI1dDRyrWD5E8YvX/2krR9w6UsmWO2ZzWRLLiFD88Z7NHyuib0gjP8DbvlTIhnJQiTSjf3BAnDepbxnBwFBOt1H9jRdh8d/tDBlILqh5YBe7yPeMffmYi2mKEqtfj0xhCwxodfwA0Lw6Jjz+0Zr3eI/qmA0MPXKw4GHC7VoJQY+wYmE5nmanYmfiw5+Sby/eayQ6oHmaSEtozCwFcCdEjy9ruDrHw7QAGjNBW+gi8H5vOI95n8qJFAexEQtV8bb0Ri/A1PDnD65DQWmMvLTVn1Qj9wey6Gw7xCJh3etGzOoiRGG24ckiOFkg77mEp2HO95JXLUaSR7PiFBwaH7YDRo X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, Jul 3, 2023 at 11:23=E2=80=AFPM Yin, Fengwei wrote: > > > > On 7/4/2023 11:59 AM, Yu Zhao wrote: > > On Mon, Jul 3, 2023 at 9:02=E2=80=AFPM Yu Zhao wrot= e: > >> > >> On Mon, Jul 3, 2023 at 8:23=E2=80=AFPM Yin, Fengwei wrote: > >>> > >>> > >>> > >>> On 7/3/2023 9:53 PM, Ryan Roberts wrote: > >>>> arch_wants_pte_order() can be overridden by the arch to return the > >>>> preferred folio order for pte-mapped memory. This is useful as some > >>>> architectures (e.g. arm64) can coalesce TLB entries when the physica= l > >>>> memory is suitably contiguous. > >>>> > >>>> The first user for this hint will be FLEXIBLE_THP, which aims to > >>>> allocate large folios for anonymous memory to reduce page faults and > >>>> other per-page operation costs. > >>>> > >>>> Here we add the default implementation of the function, used when th= e > >>>> architecture does not define it, which returns the order correspondi= ng > >>>> to 64K. > >>>> > >>>> Signed-off-by: Ryan Roberts > >>>> --- > >>>> include/linux/pgtable.h | 13 +++++++++++++ > >>>> 1 file changed, 13 insertions(+) > >>>> > >>>> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h > >>>> index a661a17173fa..f7e38598f20b 100644 > >>>> --- a/include/linux/pgtable.h > >>>> +++ b/include/linux/pgtable.h > >>>> @@ -13,6 +13,7 @@ > >>>> #include > >>>> #include > >>>> #include > >>>> +#include > >>>> > >>>> #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_F= OLDED) - \ > >>>> defined(__PAGETABLE_PMD_FOLDED) !=3D CONFIG_PGTABLE_LEVELS > >>>> @@ -336,6 +337,18 @@ static inline bool arch_has_hw_pte_young(void) > >>>> } > >>>> #endif > >>>> > >>>> +#ifndef arch_wants_pte_order > >>>> +/* > >>>> + * Returns preferred folio order for pte-mapped memory. Must be in = range [0, > >>>> + * PMD_SHIFT-PAGE_SHIFT) and must not be order-1 since THP requires= large folios > >>>> + * to be at least order-2. > >>>> + */ > >>>> +static inline int arch_wants_pte_order(struct vm_area_struct *vma) > >>>> +{ > >>>> + return ilog2(SZ_64K >> PAGE_SHIFT); > >>> Default value which is not related with any silicon may be: PAGE_ALLO= C_COSTLY_ORDER? > >>> > >>> Also, current pcp list support cache page with order 0...PAGE_ALLOC_C= OSTLY_ORDER, 9. > >>> If the pcp could cover the page, the pressure to zone lock will be re= duced by pcp. > >> > >> The value of PAGE_ALLOC_COSTLY_ORDER is reasonable but again it's a > >> s/w policy not a h/w preference. Besides, I don't think we can include > >> mmzone.h in pgtable.h. > > > > I think we can make a compromise: > > 1. change the default implementation of arch_has_hw_pte_young() to retu= rn 0, and > > 2. in memory.c, we can try PAGE_ALLOC_COSTLY_ORDER for archs that > > don't override arch_has_hw_pte_young(), or if its return value is too > > large to fit. > Do you mean arch_wants_pte_order()? Yes. This looks good to me. Thanks. Sorry, copied the wrong function from above and pasted without looking...