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From: Marco Elver <elver@google.com>
To: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Ryan Roberts <ryan.roberts@arm.com>,
	Alexander Potapenko <glider@google.com>,
	 Dmitry Vyukov <dvyukov@google.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	 Ard Biesheuvel <ardb@kernel.org>,
	Andrey Ryabinin <ryabinin.a.a@gmail.com>,
	 Andrey Konovalov <andreyknvl@gmail.com>,
	Vincenzo Frascino <vincenzo.frascino@arm.com>,
	 kasan-dev@googlegroups.com, linux-riscv@lists.infradead.org,
	 linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	 kvm-riscv@lists.infradead.org, linux-efi@vger.kernel.org,
	linux-mm@kvack.org
Subject: Re: [PATCH 4/5] riscv: Suffix all page table entry pointers with 'p'
Date: Thu, 12 Oct 2023 14:13:44 +0200	[thread overview]
Message-ID: <CANpmjNMvQUSNU+U80nWrUWPc4sszvSTGvivJjk0HOw8LRWx1sg@mail.gmail.com> (raw)
In-Reply-To: <20231002151031.110551-5-alexghiti@rivosinc.com>

On Mon, 2 Oct 2023 at 17:14, Alexandre Ghiti <alexghiti@rivosinc.com> wrote:
>
> That makes it more clear what the underlying type is, no functional
> changes intended.
>
> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> ---
>  arch/riscv/include/asm/kfence.h     |  6 +-
>  arch/riscv/include/asm/kvm_host.h   |  2 +-
>  arch/riscv/include/asm/pgalloc.h    | 86 +++++++++++++-------------
>  arch/riscv/include/asm/pgtable-64.h | 20 +++---
>  arch/riscv/kvm/mmu.c                | 22 +++----
>  arch/riscv/mm/fault.c               | 38 ++++++------
>  arch/riscv/mm/hugetlbpage.c         | 78 +++++++++++------------
>  arch/riscv/mm/init.c                | 30 ++++-----
>  arch/riscv/mm/kasan_init.c          | 96 ++++++++++++++---------------
>  arch/riscv/mm/pageattr.c            | 74 +++++++++++-----------
>  arch/riscv/mm/pgtable.c             | 46 +++++++-------
>  11 files changed, 251 insertions(+), 247 deletions(-)
>
> diff --git a/arch/riscv/include/asm/kfence.h b/arch/riscv/include/asm/kfence.h
> index 0bbffd528096..3b482d0a4633 100644
> --- a/arch/riscv/include/asm/kfence.h
> +++ b/arch/riscv/include/asm/kfence.h
> @@ -15,12 +15,12 @@ static inline bool arch_kfence_init_pool(void)
>
>  static inline bool kfence_protect_page(unsigned long addr, bool protect)
>  {
> -       pte_t *pte = virt_to_kpte(addr);
> +       pte_t *ptep = virt_to_kpte(addr);
>
>         if (protect)
> -               set_pte(pte, __pte(pte_val(*pte) & ~_PAGE_PRESENT));
> +               set_pte(ptep, __pte(pte_val(*ptep) & ~_PAGE_PRESENT));
>         else
> -               set_pte(pte, __pte(pte_val(*pte) | _PAGE_PRESENT));
> +               set_pte(ptep, __pte(pte_val(*ptep) | _PAGE_PRESENT));
>
>         flush_tlb_kernel_range(addr, addr + PAGE_SIZE);

As others expressed, this seems unnecessary. It doesn't make the code
any clearer to me.

However, for your subsystem you make the rules. I would just suggest
to keep things consistent with other kernel code, although there are
already stylistic deviations between subsystems (e.g. comment style in
net and rcu vs rest), I'd simply vote for fewer deviations between
subsystems.

Real downsides of stylistic changes that have unclear benefit:
1. stable backports become more difficult.
2. chasing a change with git blame becomes harder.


  parent reply	other threads:[~2023-10-12 12:14 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-02 15:10 [PATCH 0/5] riscv: Use READ_ONCE()/WRITE_ONCE() for pte accesses Alexandre Ghiti
2023-10-02 15:10 ` [PATCH 1/5] riscv: Use WRITE_ONCE() when setting page table entries Alexandre Ghiti
2023-10-02 15:10 ` [PATCH 2/5] mm: Introduce pudp/p4dp/pgdp_get() functions Alexandre Ghiti
2023-10-03  6:25   ` kernel test robot
2023-10-03  7:52   ` kernel test robot
2023-10-02 15:10 ` [PATCH 3/5] riscv: mm: Only compile pgtable.c if MMU Alexandre Ghiti
2023-10-02 15:10 ` [PATCH 4/5] riscv: Suffix all page table entry pointers with 'p' Alexandre Ghiti
2023-10-12 11:33   ` Conor Dooley
2023-10-12 11:35     ` Conor Dooley
2023-10-13  9:58       ` Andrew Jones
2023-10-19  9:06         ` Alexandre Ghiti
2023-10-12 12:13   ` Marco Elver [this message]
2023-10-02 15:10 ` [PATCH 5/5] riscv: Use accessors to page table entries instead of direct dereference Alexandre Ghiti
2023-12-07 15:34 ` [PATCH 0/5] riscv: Use READ_ONCE()/WRITE_ONCE() for pte accesses Palmer Dabbelt

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