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AJvYcCV1AJ2/EGKgrzASCBxEDVAtNbQI9vPJ6JaSyWiHxnpg9xhhqvZqdSHIc6Zdwce0RR45W/EfZIuIsg==@kvack.org X-Gm-Message-State: AOJu0Yw1WxF4gknokLUeyYS397xmFbn1W2IW3XLs/YNR5s8nxc6KnTGP Kjv8DnPOu248SpZmvuTUQhrYJiwzBXXI5NCpvn19Cccvn/JT0gTh3Gsh/5jz/s82ilcqpUdQXJe 0xxi4JLDzYsTDft5+2FkG7lOnmwf6nAiZsw3s+A== X-Gm-Gg: ASbGncvsUkSq2tx9uccxUeazeobNpN6/89rxLY+Rv+2rbHjpNv5vcArbOdTqAsaPUCh 4HVGhqUfoE8K7NpvYPp8NVxMTAueBxjG1Ya8VURaiVgQfj105I0s9jsgQtPwxpQ2lYUfBUqWMUg xjyb0brAGNUYnt6ccQXH0d5WLejDvk9e5AEvIFYK0= X-Google-Smtp-Source: AGHT+IFyvkT12+i013M0vxzjGYoHvGKmiPNTdSQO7eiKOWYYyKKOPLHni3BWX5f++FKmCcCNeYHl2rGHeIQykLNckAU= X-Received: by 2002:a05:6e02:1aa8:b0:3d3:f4fc:a291 with SMTP id e9e14a558f8ab-3d483a8dc2amr13220485ab.19.1741937892021; Fri, 14 Mar 2025 00:38:12 -0700 (PDT) MIME-Version: 1.0 References: <20250310-v5_user_cfi_series-v11-0-86b36cbfb910@rivosinc.com> <20250310-v5_user_cfi_series-v11-23-86b36cbfb910@rivosinc.com> In-Reply-To: <20250310-v5_user_cfi_series-v11-23-86b36cbfb910@rivosinc.com> From: Zong Li Date: Fri, 14 Mar 2025 15:37:58 +0800 X-Gm-Features: AQ5f1JrlSOfjsucljdPYnudPUFm9fomUfZIh4MbxfMyusAcNQh-nryqNstYXxqM Message-ID: Subject: Re: [PATCH v11 23/27] arch/riscv: compile vdso with landing pad To: Deepak Gupta Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley , linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Rspam-User: X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: 1C5D6180007 X-Stat-Signature: sd3swfnqwnyn5nwtcrzxogefasu1bzby X-HE-Tag: 1741937892-797405 X-HE-Meta: U2FsdGVkX18XHuVacLvKF4vKBEOqi+/5Ff79BctxY/d6PgmQit/lZu5ZTSFum21RxIigary019Z0bmxcAE5PzteTt4TJKesY1jNGtTg1niGikuUA3UwX6zOMhjM06X8z8nCyrZnCWEhZOGLESNMa7MdShUzfr9vVw8B/masx7c+ST5B/rAoClYxEOm0qTMTrY2yn8M7w7qGbcXsVH6aXQx05J/2VL4OCXo+365a9B/CslZwqKBwirxoNluLWIU944yAZzCqJyAt1l3EKw3sV4Q8wx1HbAyVBZj85D6WFRwm1qq7R4nLRQcU3xD0zUqbTX5AUws8WN6l8hnpYdZERKHy1H6DBYneourmsPMOKJTZA45Id0/ZjQ2A0/hrt7q3TvldJaDcgszjoH4PFGis9Tzo7cGKgCLM13XhXWUjneU0VJTR3A1/RoSfuJQGDrRGGqANTlaMTFd0U99diaU/jjH3czX+OqGLW+q7mw7gdVi+7+XUxlOc+eLJxu+32ptocYxChtN2tKPhJDPiqDObAJescoiAsViOtlY+Atg/xJDVSlDIMkFF9p0klz4j6aoBhZT0d3be5AJfgKqTQ4mZ7yYRshDsyZKgmL67Brn/GuP5LLLhmbuCekgbTKyW1o5BAojNH7qgTOtHOdFButahaHgGYNncfHctKvYBHPJEet2mKe/MaFET0unqnHcOufZ5+YMFC7uP78BE1b2KCSFFXnwQTdLfW77E7vZgIgWsqNJ3qAVNPk3G0NneTg50E5l0pqTd9mw+pAJOOXrBAPZ+45VOMWSJBOTK6tIYavs//JgVTevmap68hyfRLZ42kI3M0bLHwSYUpEq7ioBY9kii6R/XkVzMVxqTU3t9iQgLJQYMjWDIsnZuJ28hRhxASfUvABtWypQ05cbntK9A8UFy9Zgw28CT99bwilbhfZx69zgpE+c2bH4OiG0717CrQViv4nBAzABk8ADYymzlEkb+ RJwVmibQ qKaqYVk2cEvUWG7krk4iN+dyTK1YZk0pirw52enxYLo2YSakWIXFrkBUfaXf0MftR8C0laiciV1smSz2inNaVefc2hIYTRdn3FntOlsQO0yb6DstTS1BksDlWtjDuc+hMSOefxnbUdq6hZtwrmcG1l/1IHLd//EKUqGl4mBlDgX/Dz3nfb3uJpbplTc91uS+m0EdeBwjqxWZMZA+j93se9av2+91ZmlIA9pl8luL/bzOrKa/wO1wtDvslnM+capc+4kSVLzp54spNRm8aL7y4z4lfZlzARofX6TdH1gRxd80Lu+HgfFxOOtY8pZL+VVzP+bASz54ER/3lTWhvEaIPmuNPOv/OyXURap2jPZMhtMAc7a1+EwBvKRaTNATPqYW9axGDMSHIMNjLS6eFJCWZH2SKxk1NJvBITk3RX5iyqoIn6OaV7OXzr+1RcyecMfI6ulVF X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Mon, Mar 10, 2025 at 11:44=E2=80=AFPM Deepak Gupta = wrote: > > From: Jim Shu > > user mode tasks compiled with zicfilp may call indirectly into vdso (like > hwprobe indirect calls). Add landing pad compile support in vdso. vdso > with landing pad in it will be nop for tasks which have not enabled > landing pad. > This patch allows to run user mode tasks with cfi eanbled and do no harm. > > Future work can be done on this to do below > - labeled landing pad on vdso functions (whenever labeling support shows > up in gnu-toolchain) > - emit shadow stack instructions only in vdso compiled objects as part o= f > kernel compile. > > Signed-off-by: Jim Shu > Signed-off-by: Deepak Gupta > --- > arch/riscv/Makefile | 7 +++++- > arch/riscv/include/asm/assembler.h | 44 +++++++++++++++++++++++++++++= ++++++ > arch/riscv/kernel/vdso/Makefile | 12 ++++++++++ > arch/riscv/kernel/vdso/flush_icache.S | 4 ++++ > arch/riscv/kernel/vdso/getcpu.S | 4 ++++ > arch/riscv/kernel/vdso/rt_sigreturn.S | 4 ++++ > arch/riscv/kernel/vdso/sys_hwprobe.S | 4 ++++ > 7 files changed, 78 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile > index 13fbc0f94238..ea9468af2cb4 100644 > --- a/arch/riscv/Makefile > +++ b/arch/riscv/Makefile > @@ -87,10 +87,15 @@ riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZACAS) :=3D $(risc= v-march-y)_zacas > > # Check if the toolchain supports Zabha > riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZABHA) :=3D $(riscv-march-y)_zabha > +# Check if the toolchain supports Zihintpause extension > +riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) :=3D $(riscv-march-y)_zi= hintpause I think we don't need this, it has removed by the '6da111574baf ("riscv: Provide a definition for 'pause'")'. Apart from that, this patch looks good to me. Reviewed-by: Zong Li > + > +KBUILD_BASE_ISA =3D -march=3D$(shell echo $(riscv-march-y) | sed -E 's/(= rv32ima|rv64ima)fd([^v_]*)v?/\1\2/') > +export KBUILD_BASE_ISA > > # Remove F,D,V from isa string for all. Keep extensions between "fd" and= "v" by > # matching non-v and non-multi-letter extensions out with the filter ([^= v_]*) > -KBUILD_CFLAGS +=3D -march=3D$(shell echo $(riscv-march-y) | sed -E 's/(r= v32ima|rv64ima)fd([^v_]*)v?/\1\2/') > +KBUILD_CFLAGS +=3D $(KBUILD_BASE_ISA) > > KBUILD_AFLAGS +=3D -march=3D$(riscv-march-y) > > diff --git a/arch/riscv/include/asm/assembler.h b/arch/riscv/include/asm/= assembler.h > index 44b1457d3e95..a058ea5e9c58 100644 > --- a/arch/riscv/include/asm/assembler.h > +++ b/arch/riscv/include/asm/assembler.h > @@ -80,3 +80,47 @@ > .endm > > #endif /* __ASM_ASSEMBLER_H */ > + > +#if defined(CONFIG_RISCV_USER_CFI) && (__riscv_xlen =3D=3D 64) > +.macro vdso_lpad > +lpad 0 > +.endm > +#else > +.macro vdso_lpad > +.endm > +#endif > + > +/* > + * This macro emits a program property note section identifying > + * architecture features which require special handling, mainly for > + * use in assembly files included in the VDSO. > + */ > +#define NT_GNU_PROPERTY_TYPE_0 5 > +#define GNU_PROPERTY_RISCV_FEATURE_1_AND 0xc0000000 > + > +#define GNU_PROPERTY_RISCV_FEATURE_1_ZICFILP (1U << 0) > +#define GNU_PROPERTY_RISCV_FEATURE_1_ZICFISS (1U << 1) > + > +#if defined(CONFIG_RISCV_USER_CFI) && (__riscv_xlen =3D=3D 64) > +#define GNU_PROPERTY_RISCV_FEATURE_1_DEFAULT \ > + (GNU_PROPERTY_RISCV_FEATURE_1_ZICFILP) > +#endif > + > +#ifdef GNU_PROPERTY_RISCV_FEATURE_1_DEFAULT > +.macro emit_riscv_feature_1_and, feat =3D GNU_PROPERTY_RISCV_FEATURE_1_D= EFAULT > + .pushsection .note.gnu.property, "a" > + .p2align 3 > + .word 4 > + .word 16 > + .word NT_GNU_PROPERTY_TYPE_0 > + .asciz "GNU" > + .word GNU_PROPERTY_RISCV_FEATURE_1_AND > + .word 4 > + .word \feat > + .word 0 > + .popsection > +.endm > +#else > +.macro emit_riscv_feature_1_and, feat =3D 0 > +.endm > +#endif > diff --git a/arch/riscv/kernel/vdso/Makefile b/arch/riscv/kernel/vdso/Mak= efile > index 9a1b555e8733..daa10c2b0dd1 100644 > --- a/arch/riscv/kernel/vdso/Makefile > +++ b/arch/riscv/kernel/vdso/Makefile > @@ -13,12 +13,18 @@ vdso-syms +=3D flush_icache > vdso-syms +=3D hwprobe > vdso-syms +=3D sys_hwprobe > > +ifdef CONFIG_RISCV_USER_CFI > +LPAD_MARCH =3D _zicfilp > +endif > + > # Files to link into the vdso > obj-vdso =3D $(patsubst %, %.o, $(vdso-syms)) note.o > > ccflags-y :=3D -fno-stack-protector > ccflags-y +=3D -DDISABLE_BRANCH_PROFILING > ccflags-y +=3D -fno-builtin > +ccflags-y +=3D $(KBUILD_BASE_ISA)$(LPAD_MARCH) > +asflags-y +=3D $(KBUILD_BASE_ISA)$(LPAD_MARCH) > > ifneq ($(c-gettimeofday-y),) > CFLAGS_vgettimeofday.o +=3D -fPIC -include $(c-gettimeofday-y) > @@ -40,6 +46,12 @@ endif > CFLAGS_REMOVE_vgettimeofday.o =3D $(CC_FLAGS_FTRACE) $(CC_FLAGS_SCS) > CFLAGS_REMOVE_hwprobe.o =3D $(CC_FLAGS_FTRACE) $(CC_FLAGS_SCS) > > +# Disable profiling and instrumentation for VDSO code > +GCOV_PROFILE :=3D n > +KCOV_INSTRUMENT :=3D n > +KASAN_SANITIZE :=3D n > +UBSAN_SANITIZE :=3D n > + > # Force dependency > $(obj)/vdso.o: $(obj)/vdso.so > > diff --git a/arch/riscv/kernel/vdso/flush_icache.S b/arch/riscv/kernel/vd= so/flush_icache.S > index 8f884227e8bc..e4c56970905e 100644 > --- a/arch/riscv/kernel/vdso/flush_icache.S > +++ b/arch/riscv/kernel/vdso/flush_icache.S > @@ -5,11 +5,13 @@ > > #include > #include > +#include > > .text > /* int __vdso_flush_icache(void *start, void *end, unsigned long flags);= */ > SYM_FUNC_START(__vdso_flush_icache) > .cfi_startproc > + vdso_lpad > #ifdef CONFIG_SMP > li a7, __NR_riscv_flush_icache > ecall > @@ -20,3 +22,5 @@ SYM_FUNC_START(__vdso_flush_icache) > ret > .cfi_endproc > SYM_FUNC_END(__vdso_flush_icache) > + > +emit_riscv_feature_1_and > diff --git a/arch/riscv/kernel/vdso/getcpu.S b/arch/riscv/kernel/vdso/get= cpu.S > index 9c1bd531907f..5c1ecc4e1465 100644 > --- a/arch/riscv/kernel/vdso/getcpu.S > +++ b/arch/riscv/kernel/vdso/getcpu.S > @@ -5,14 +5,18 @@ > > #include > #include > +#include > > .text > /* int __vdso_getcpu(unsigned *cpu, unsigned *node, void *unused); */ > SYM_FUNC_START(__vdso_getcpu) > .cfi_startproc > + vdso_lpad > /* For now, just do the syscall. */ > li a7, __NR_getcpu > ecall > ret > .cfi_endproc > SYM_FUNC_END(__vdso_getcpu) > + > +emit_riscv_feature_1_and > diff --git a/arch/riscv/kernel/vdso/rt_sigreturn.S b/arch/riscv/kernel/vd= so/rt_sigreturn.S > index 3dc022aa8931..e82987dc3739 100644 > --- a/arch/riscv/kernel/vdso/rt_sigreturn.S > +++ b/arch/riscv/kernel/vdso/rt_sigreturn.S > @@ -5,12 +5,16 @@ > > #include > #include > +#include > > .text > SYM_FUNC_START(__vdso_rt_sigreturn) > .cfi_startproc > .cfi_signal_frame > + vdso_lpad > li a7, __NR_rt_sigreturn > ecall > .cfi_endproc > SYM_FUNC_END(__vdso_rt_sigreturn) > + > +emit_riscv_feature_1_and > diff --git a/arch/riscv/kernel/vdso/sys_hwprobe.S b/arch/riscv/kernel/vds= o/sys_hwprobe.S > index 77e57f830521..f1694451a60c 100644 > --- a/arch/riscv/kernel/vdso/sys_hwprobe.S > +++ b/arch/riscv/kernel/vdso/sys_hwprobe.S > @@ -3,13 +3,17 @@ > > #include > #include > +#include > > .text > SYM_FUNC_START(riscv_hwprobe) > .cfi_startproc > + vdso_lpad > li a7, __NR_riscv_hwprobe > ecall > ret > > .cfi_endproc > SYM_FUNC_END(riscv_hwprobe) > + > +emit_riscv_feature_1_and > > -- > 2.34.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv