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AJvYcCW1+VcQSOJuZfpnG+gCd5G+FqXix4SngEsH2nULBfd/ki55JPbPVcEWRRhGlw+sPUVWXmIzf7c1AA==@kvack.org X-Gm-Message-State: AOJu0YzkXqBAgQmG6aycrIzbaIpnRVl8RPU22Xj9JJ67NsLwxpLBa7DE mX7Rri1WFJ/VANev+HFOk56Gx8BQ8MjCutsZZ76TAo+108xqXHwnP2Jc2R1Wa234ZKiBetw++zO f9rxI5K8NVGvzXDPsC3eXoW8kGH7UES5ct7ef3T16aQ== X-Gm-Gg: ASbGnctFfaPC/NYwUBzpvaLoCp6nOlK/aKSqpIoehCturrLue8mk1qYPu5Es48om4kt L7mceIxpHluS7lX73MpUVT7tX2RDu9bTK0MJ81T2zj9kGU1bNsPi5/UH6hyiRU/vuzEFwZT+lg9 KL0hnnBrcCNc6DC20NBOFa/HSE3RlKZQgEYXQaHaQI6mdvEw== X-Google-Smtp-Source: AGHT+IH6hRbPz4KJd4uHusg55uzqEZNbIEEtPoBg2Di8b55LbLqgN3m0kaio6V1nAiVuXSaR5cp2kjghUWOHqxTA20U= X-Received: by 2002:a05:6e02:19c8:b0:3dd:a3e4:2def with SMTP id e9e14a558f8ab-3de38cbfe5cmr169073095ab.16.1750750181761; Tue, 24 Jun 2025 00:29:41 -0700 (PDT) MIME-Version: 1.0 References: <20250604-v5_user_cfi_series-v17-0-4565c2cf869f@rivosinc.com> <20250604-v5_user_cfi_series-v17-23-4565c2cf869f@rivosinc.com> In-Reply-To: <20250604-v5_user_cfi_series-v17-23-4565c2cf869f@rivosinc.com> From: Zong Li Date: Tue, 24 Jun 2025 15:29:23 +0800 X-Gm-Features: AX0GCFtqo33kUwQ41tFem8GGyjdAkGeTRdsf_5aqfLZF6MkgxmnaqyzxPU27Aco Message-ID: Subject: Re: [PATCH v17 23/27] arch/riscv: compile vdso with landing pad To: Deepak Gupta Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?Q?Bj=C3=B6rn_Roy_Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: F09B81C0007 X-Stat-Signature: xpqq6ah94z1cspy99w33iemjg3p58aze X-Rspam-User: X-HE-Tag: 1750750182-298455 X-HE-Meta: U2FsdGVkX188pWFqmZhXzsBuATLPC4XfsRGsYMbPspIRReO2hkbU5AiuhCl2ZmJFm3xom5xyc5Q30QX2vRQwXbnReSTkc4JAqs2LvbscwXWvHqj1A2lq9+Q6BFnFm8hstuA+0aT6e/eNM1xmc8e3OZFFLApt5lu5tHYwYN/uK8j0duUZDSd6P5ScUYmHBAlt0D1tzqT6FW0Jxl+ASTnLhoJLd2HWArQU7ZpDFnmYioZdp5qJHqo6CXrDbjvBfAddi6vpoc055cKYYjEu/IzdRCUK/iO/XAleQKnWCoRFWUbNLQ2i1cvqxzsWcefKrGg1Y5lhcbUJXqYy8YAO9msJk/9kFFbkpTGWiV9BsWaZoRAB4Gt4NyxGray6y9YsfW75Tfe+0o28S9eRqe+u7I8CHftRpYgOUN4JglYQKP13l+nLZA19O7usFn1FhZ6LcoUJmujlXyUwUGMyqXiUJBUwW3S5gFYfBVsve/dGdTBOLo6nETS3zA4gLOjEdNP3/TZYP3/2w+4vhA6JTx9NA27lx2QS5cibOpeb8v4FMx0Oz2/ViVI5Jqr5dmsOra/H4i4rRfLwlxR/5qTfkcT/aM3QBgwWv2kbnnssMahxjbI6RerhqAd366o15pn5E8GAmHmT52LxGIXqxBneA6HWoV9Na2ZbsUgmTiIqJvnRJGo+qQrLdAqJFiiXxWL9HZel7X5ZHsStRGy3BDiTbK4QthrmtXk70U5tcTwgeeLOKIRMCTFosy/8F0pa73mdjvvntAFfVK05zjVfMHLfk9vfR0x0VxQz1LW4c+l5U4Yg/QB2R8h3EXLGReMShR90Bjifpf7TPtBZCpBO63zQm4QpqgtAHksEPvFjADxW3iWtzYzc+EccySiphSNKEFoMkfj25hMeIItP5lKI7CErScbhP5rTHER9+yyh/Ycu1U8GMlAcQDFL4NLb5m/+k44C58wEh9x3imldBWejCFtetLftAQG jOuKObR7 rwRMuBqlRdssRfarZ3WyhIc/ooR4bh13Q49j2MLkz43vZxIVz4bYiUO3oM5OhqQJOLhqhr0WcxY/fE0kLUuCFTSRF/Eslg9tUJM10vWHNWGzS/BvDMgHu62NhsacFV8lhf8AKsUm+ZP3cBGCp6abwUDX3mwC8Q0kH1Q0msuO4v95siiDOY0+yc2Ik8FYlhbByGtQjykWU+d2bN71p+1fNSSYrzXM7ys5qxYP7a0K3IFVuqCkMyfSIhConiW+gyyJ2/sDo6IX3quMP6cCYiwcmj1ATCNBo0FN7EPu/Em3Q1aet5IF4geIE+sHZbmnb2pjJJ0E0l9S/wfcBR5TjRyByK4uZIqBH4uRK5AE3ZOo7RZ4pddxnPqiFkKUn1pvaMjNjW0bk X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Thu, Jun 5, 2025 at 1:17=E2=80=AFAM Deepak Gupta wr= ote: > > From: Jim Shu > > user mode tasks compiled with zicfilp may call indirectly into vdso (like > hwprobe indirect calls). Add landing pad compile support in vdso. vdso > with landing pad in it will be nop for tasks which have not enabled > landing pad. > This patch allows to run user mode tasks with cfi eanbled and do no harm. > > Future work can be done on this to do below > - labeled landing pad on vdso functions (whenever labeling support shows > up in gnu-toolchain) > - emit shadow stack instructions only in vdso compiled objects as part o= f > kernel compile. > > Signed-off-by: Jim Shu > Reviewed-by: Zong Li > Signed-off-by: Deepak Gupta > --- > arch/riscv/Makefile | 5 +++- > arch/riscv/include/asm/assembler.h | 44 +++++++++++++++++++++++++++++= ++++++ > arch/riscv/kernel/vdso/Makefile | 6 +++++ > arch/riscv/kernel/vdso/flush_icache.S | 4 ++++ > arch/riscv/kernel/vdso/getcpu.S | 4 ++++ > arch/riscv/kernel/vdso/rt_sigreturn.S | 4 ++++ > arch/riscv/kernel/vdso/sys_hwprobe.S | 4 ++++ > 7 files changed, 70 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile > index 539d2aef5cab..c2dd09bb9db3 100644 > --- a/arch/riscv/Makefile > +++ b/arch/riscv/Makefile > @@ -88,9 +88,12 @@ riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZACAS) :=3D $(riscv= -march-y)_zacas > # Check if the toolchain supports Zabha > riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZABHA) :=3D $(riscv-march-y)_zabha > > +KBUILD_BASE_ISA =3D -march=3D$(shell echo $(riscv-march-y) | sed -E 's/(= rv32ima|rv64ima)fd([^v_]*)v?/\1\2/') > +export KBUILD_BASE_ISA > + > # Remove F,D,V from isa string for all. Keep extensions between "fd" and= "v" by > # matching non-v and non-multi-letter extensions out with the filter ([^= v_]*) > -KBUILD_CFLAGS +=3D -march=3D$(shell echo $(riscv-march-y) | sed -E 's/(r= v32ima|rv64ima)fd([^v_]*)v?/\1\2/') > +KBUILD_CFLAGS +=3D $(KBUILD_BASE_ISA) > > KBUILD_AFLAGS +=3D -march=3D$(riscv-march-y) > > diff --git a/arch/riscv/include/asm/assembler.h b/arch/riscv/include/asm/= assembler.h > index 44b1457d3e95..a058ea5e9c58 100644 > --- a/arch/riscv/include/asm/assembler.h > +++ b/arch/riscv/include/asm/assembler.h > @@ -80,3 +80,47 @@ > .endm > > #endif /* __ASM_ASSEMBLER_H */ > + > +#if defined(CONFIG_RISCV_USER_CFI) && (__riscv_xlen =3D=3D 64) > +.macro vdso_lpad > +lpad 0 > +.endm > +#else > +.macro vdso_lpad > +.endm > +#endif > + > +/* > + * This macro emits a program property note section identifying > + * architecture features which require special handling, mainly for > + * use in assembly files included in the VDSO. > + */ > +#define NT_GNU_PROPERTY_TYPE_0 5 > +#define GNU_PROPERTY_RISCV_FEATURE_1_AND 0xc0000000 > + > +#define GNU_PROPERTY_RISCV_FEATURE_1_ZICFILP (1U << 0) > +#define GNU_PROPERTY_RISCV_FEATURE_1_ZICFISS (1U << 1) > + > +#if defined(CONFIG_RISCV_USER_CFI) && (__riscv_xlen =3D=3D 64) > +#define GNU_PROPERTY_RISCV_FEATURE_1_DEFAULT \ > + (GNU_PROPERTY_RISCV_FEATURE_1_ZICFILP) > +#endif > + > +#ifdef GNU_PROPERTY_RISCV_FEATURE_1_DEFAULT > +.macro emit_riscv_feature_1_and, feat =3D GNU_PROPERTY_RISCV_FEATURE_1_D= EFAULT > + .pushsection .note.gnu.property, "a" > + .p2align 3 > + .word 4 > + .word 16 > + .word NT_GNU_PROPERTY_TYPE_0 > + .asciz "GNU" > + .word GNU_PROPERTY_RISCV_FEATURE_1_AND > + .word 4 > + .word \feat > + .word 0 > + .popsection > +.endm > +#else > +.macro emit_riscv_feature_1_and, feat =3D 0 > +.endm > +#endif > diff --git a/arch/riscv/kernel/vdso/Makefile b/arch/riscv/kernel/vdso/Mak= efile > index ad73607abc28..441c5431d27e 100644 > --- a/arch/riscv/kernel/vdso/Makefile > +++ b/arch/riscv/kernel/vdso/Makefile > @@ -13,12 +13,18 @@ vdso-syms +=3D flush_icache > vdso-syms +=3D hwprobe > vdso-syms +=3D sys_hwprobe > > +ifdef CONFIG_RISCV_USER_CFI > +LPAD_MARCH =3D _zicfilp_zicfiss -fcf-protection=3Dfull Hi Deepak, I guess we only want to generate landing pad instructions in vdso, if so, the -fcf-protection should be set to branch instead of full. (i.e., -fcf-protection=3Dbranch). > +endif > + > # Files to link into the vdso > obj-vdso =3D $(patsubst %, %.o, $(vdso-syms)) note.o > > ccflags-y :=3D -fno-stack-protector > ccflags-y +=3D -DDISABLE_BRANCH_PROFILING > ccflags-y +=3D -fno-builtin > +ccflags-y +=3D $(KBUILD_BASE_ISA)$(LPAD_MARCH) > +asflags-y +=3D $(KBUILD_BASE_ISA)$(LPAD_MARCH) > > ifneq ($(c-gettimeofday-y),) > CFLAGS_vgettimeofday.o +=3D -fPIC -include $(c-gettimeofday-y) > diff --git a/arch/riscv/kernel/vdso/flush_icache.S b/arch/riscv/kernel/vd= so/flush_icache.S > index 8f884227e8bc..e4c56970905e 100644 > --- a/arch/riscv/kernel/vdso/flush_icache.S > +++ b/arch/riscv/kernel/vdso/flush_icache.S > @@ -5,11 +5,13 @@ > > #include > #include > +#include > > .text > /* int __vdso_flush_icache(void *start, void *end, unsigned long flags);= */ > SYM_FUNC_START(__vdso_flush_icache) > .cfi_startproc > + vdso_lpad > #ifdef CONFIG_SMP > li a7, __NR_riscv_flush_icache > ecall > @@ -20,3 +22,5 @@ SYM_FUNC_START(__vdso_flush_icache) > ret > .cfi_endproc > SYM_FUNC_END(__vdso_flush_icache) > + > +emit_riscv_feature_1_and > diff --git a/arch/riscv/kernel/vdso/getcpu.S b/arch/riscv/kernel/vdso/get= cpu.S > index 9c1bd531907f..5c1ecc4e1465 100644 > --- a/arch/riscv/kernel/vdso/getcpu.S > +++ b/arch/riscv/kernel/vdso/getcpu.S > @@ -5,14 +5,18 @@ > > #include > #include > +#include > > .text > /* int __vdso_getcpu(unsigned *cpu, unsigned *node, void *unused); */ > SYM_FUNC_START(__vdso_getcpu) > .cfi_startproc > + vdso_lpad > /* For now, just do the syscall. */ > li a7, __NR_getcpu > ecall > ret > .cfi_endproc > SYM_FUNC_END(__vdso_getcpu) > + > +emit_riscv_feature_1_and > diff --git a/arch/riscv/kernel/vdso/rt_sigreturn.S b/arch/riscv/kernel/vd= so/rt_sigreturn.S > index 3dc022aa8931..e82987dc3739 100644 > --- a/arch/riscv/kernel/vdso/rt_sigreturn.S > +++ b/arch/riscv/kernel/vdso/rt_sigreturn.S > @@ -5,12 +5,16 @@ > > #include > #include > +#include > > .text > SYM_FUNC_START(__vdso_rt_sigreturn) > .cfi_startproc > .cfi_signal_frame > + vdso_lpad > li a7, __NR_rt_sigreturn > ecall > .cfi_endproc > SYM_FUNC_END(__vdso_rt_sigreturn) > + > +emit_riscv_feature_1_and > diff --git a/arch/riscv/kernel/vdso/sys_hwprobe.S b/arch/riscv/kernel/vds= o/sys_hwprobe.S > index 77e57f830521..f1694451a60c 100644 > --- a/arch/riscv/kernel/vdso/sys_hwprobe.S > +++ b/arch/riscv/kernel/vdso/sys_hwprobe.S > @@ -3,13 +3,17 @@ > > #include > #include > +#include > > .text > SYM_FUNC_START(riscv_hwprobe) > .cfi_startproc > + vdso_lpad > li a7, __NR_riscv_hwprobe > ecall > ret > > .cfi_endproc > SYM_FUNC_END(riscv_hwprobe) > + > +emit_riscv_feature_1_and > > -- > 2.43.0 >