From: Michel Lespinasse <walken@google.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Waiman Long <waiman.long@hp.com>, Arnd Bergmann <arnd@arndb.de>,
Rik van Riel <riel@redhat.com>,
Aswin Chandramouleeswaran <aswin@hp.com>,
"Paul E.McKenney" <paulmck@linux.vnet.ibm.com>,
Raghavendra K T <raghavendra.kt@linux.vnet.ibm.com>,
"Figo. zhang" <figo1802@gmail.com>,
linux-arch@vger.kernel.org, Andi Kleen <andi@firstfloor.org>,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
George Spelvin <linux@horizon.com>,
Tim Chen <tim.c.chen@linux.intel.com>,
Ingo Molnar <mingo@elte.hu>,
Peter Hurley <peter@hurleysoftware.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Andrew Morton <akpm@linux-foundation.org>,
linux-mm <linux-mm@kvack.org>,
Andrea Arcangeli <aarcange@redhat.com>,
Alex Shi <alex.shi@linaro.org>,
linux-kernel@vger.kernel.org,
Scott J Norton <scott.norton@hp.com>,
Thomas Gleixner <tglx@linutronix.de>,
Dave Hansen <dave.hansen@intel.com>,
Matthew R Wilcox <matthew.r.wilcox@intel.com>,
Will Deacon <will.deacon@arm.com>,
Davidlohr Bueso <davidlohr.bueso@hp.com>
Subject: Re: [PATCH v3 3/5] MCS Lock: Barrier corrections
Date: Thu, 7 Nov 2013 04:50:23 -0800 [thread overview]
Message-ID: <CANN689EgdDQV=srsLELUpiTGOSF0SLUZ=BC2LnMxNrYTv3H=Wg@mail.gmail.com> (raw)
In-Reply-To: <CA+55aFwn1HUt3iXo6Zz8j1HUJi+qJ1NfcnUz-P+XCYLL7gjCMQ@mail.gmail.com>
On Thu, Nov 7, 2013 at 4:06 AM, Linus Torvalds
<torvalds@linux-foundation.org> wrote:
>
> On Nov 7, 2013 6:55 PM, "Michel Lespinasse" <walken@google.com> wrote:
>>
>> Rather than writing arch-specific locking code, would you agree to
>> introduce acquire and release memory operations ?
>
> Yes, that's probably the right thing to do. What ops do we need? Store with
> release, cmpxchg and load with acquire? Anything else?
Depends on what lock types we want to implement on top; for MCS we would need:
- xchg acquire (common case) and load acquire (for spinning on our
locker's wait word)
- cmpxchg release (when there is no next locker) and store release
(when writing to the next locker's wait word)
One downside of the proposal is that using a load acquire for spinning
puts the memory barrier within the spin loop. So this model is very
intuitive and does not add unnecessary barriers on x86, but it my
place the barriers in a suboptimal place for architectures that need
them.
--
Michel "Walken" Lespinasse
A program is never fully debugged until the last user dies.
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next prev parent reply other threads:[~2013-11-07 12:50 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1383771175.git.tim.c.chen@linux.intel.com>
2013-11-06 21:36 ` [PATCH v3 0/4] MCS Lock: MCS lock code cleanup and optimizations Tim Chen
2013-11-06 21:41 ` Davidlohr Bueso
2013-11-06 23:55 ` Tim Chen
2013-11-06 21:42 ` H. Peter Anvin
2013-11-06 21:59 ` Michel Lespinasse
2013-11-06 21:37 ` [PATCH v3 1/5] MCS Lock: Restructure the MCS lock defines and locking code into its own file Tim Chen
2013-11-06 21:37 ` [PATCH v3 2/5] MCS Lock: optimizations and extra comments Tim Chen
2013-11-06 21:47 ` Tim Chen
2013-11-06 21:37 ` [PATCH v3 3/5] MCS Lock: Barrier corrections Tim Chen
2013-11-07 1:39 ` Linus Torvalds
2013-11-07 4:29 ` Waiman Long
2013-11-07 8:13 ` Ingo Molnar
2013-11-07 8:22 ` Linus Torvalds
2013-11-07 8:25 ` Ingo Molnar
2013-11-07 9:55 ` Michel Lespinasse
2013-11-07 12:06 ` Linus Torvalds
2013-11-07 12:50 ` Michel Lespinasse [this message]
2013-11-07 14:31 ` Paul E. McKenney
2013-11-07 19:59 ` Michel Lespinasse
2013-11-07 21:15 ` Tim Chen
2013-11-07 22:21 ` Peter Zijlstra
2013-11-07 22:43 ` Michel Lespinasse
2013-11-08 1:16 ` Tim Chen
2013-11-06 21:37 ` [PATCH v3 4/5] MCS Lock: Make mcs_spinlock.h includable in other files Tim Chen
2013-11-06 21:41 ` Tim Chen
2013-11-06 21:37 ` [PATCH v3 5/5] MCS Lock: Allow architecture specific memory barrier in lock/unlock Tim Chen
2013-11-06 21:42 ` Tim Chen
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