From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-it0-f72.google.com (mail-it0-f72.google.com [209.85.214.72]) by kanga.kvack.org (Postfix) with ESMTP id E9F216B0003 for ; Mon, 5 Mar 2018 12:21:38 -0500 (EST) Received: by mail-it0-f72.google.com with SMTP id y64so9472283itd.4 for ; Mon, 05 Mar 2018 09:21:38 -0800 (PST) Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id k194sor5104947itb.54.2018.03.05.09.21.37 for (Google Transport Security); Mon, 05 Mar 2018 09:21:37 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <20180305164448.GS16484@8bytes.org> References: <1520245563-8444-1-git-send-email-joro@8bytes.org> <1520245563-8444-8-git-send-email-joro@8bytes.org> <20180305131231.GR16484@8bytes.org> <20180305164448.GS16484@8bytes.org> From: Brian Gerst Date: Mon, 5 Mar 2018 12:21:36 -0500 Message-ID: Subject: Re: [PATCH 07/34] x86/entry/32: Restore segments before int registers Content-Type: text/plain; charset="UTF-8" Sender: owner-linux-mm@kvack.org List-ID: To: Joerg Roedel Cc: Linus Torvalds , Thomas Gleixner , Ingo Molnar , Peter Anvin , the arch/x86 maintainers , Linux Kernel Mailing List , linux-mm , Andrew Lutomirski , Dave Hansen , Josh Poimboeuf , =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , David Laight , Denys Vlasenko , Eduardo Valentin , Greg Kroah-Hartman , Will Deacon , "Liguori, Anthony" , Daniel Gruss , Hugh Dickins , Kees Cook , Andrea Arcangeli , Waiman Long , Pavel Machek , Joerg Roedel On Mon, Mar 5, 2018 at 11:44 AM, Joerg Roedel wrote: > On Mon, Mar 05, 2018 at 09:51:29AM -0500, Brian Gerst wrote: >> For the IRET fault case you will still need to catch it in the >> exception code. See the 64-bit code (.Lerror_bad_iret) for example. >> For 32-bit, you could just expand that check to cover the whole exit >> prologue after the CR3 switch, including the data segment loads. > > I had a look at the 64 bit code and the exception-in-kernel case seems > to be handled differently than on 32 bit. The 64 bit entry code has > checks for certain kinds of errors like iret exceptions. > > On 32 bit this is implemented via the standard exception tables which > get an entry for every EIP that might fault (usually segment loading > operations, but also iret). > > So, unless I am missing something, all the exception entry code has to > do is to remember the stack and the cr3 with which it was entered (if > entered from kernel mode) and restore those before iret. And this is > what I implemented in v3 of this patch-set. I also noticed that 32-bit will raise SIGILL for all IRET faults, while 64-bit will raise SIGBUS (#NP/#SS) or SIGSEGV (#GP). The 64-bit code is better since it doesn't lose the original fault type, whereas SIGILL is wrong for this case (illegal opcode). -- Brian Gerst -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org