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Mon, 14 Oct 2024 04:21:44 -0700 (PDT) MIME-Version: 1.0 References: <20241014105514.3206191-1-ryan.roberts@arm.com> <20241014105912.3207374-1-ryan.roberts@arm.com> <20241014105912.3207374-55-ryan.roberts@arm.com> In-Reply-To: <20241014105912.3207374-55-ryan.roberts@arm.com> From: Ard Biesheuvel Date: Mon, 14 Oct 2024 13:21:33 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RFC PATCH v1 55/57] arm64: TRAMP_VALIAS is no longer compile-time constant To: Ryan Roberts Cc: Andrew Morton , Anshuman Khandual , Catalin Marinas , David Hildenbrand , Greg Marsden , Ivan Ivanov , Kalesh Singh , Marc Zyngier , Mark Rutland , Matthias Brugger , Miroslav Benes , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Content-Type: text/plain; charset="UTF-8" X-Rspamd-Queue-Id: 3E673100012 X-Rspam-User: X-Rspamd-Server: rspam05 X-Stat-Signature: 7se165syrxztz8ghqem14x7b4xfhxgt5 X-HE-Tag: 1728904900-848618 X-HE-Meta: U2FsdGVkX18ogdeOJi6mOIowpjSHMmW5cXxeVV0WRJ4zsCIwUX+WRTbNx8NeHfnAKhlfNeESFY3gGC1A/x1yBDmK2pZRPhh2Qn0OgJFr34WVpU3jOlvt6Vy4RzCh6ppygj4ItDKdD8xELDNgX9FxGZVpFHNdoMR4TnOakVEnCHYTzgMoK8Au67Qfn36vVxBpew2XZYXK1axeYzMEyejuoCg6h92aXDQ070TGnk+uFrboeCwewmEqB6xozDfduC/CyyNhNagnVP/ngM5gLPrA4SSbQScm2fIsqHWUsT6do1OBUzpi1UiGYUHjaJ4Uluz7dWXoVYvJV4NBzYe5l5nXSVlmL7LXuIIIbz/9F/LQAtcx0SWcUuQe1ujEneQIFWd8kU1EmBy7GIRpM78bCpr8wZbZFYIX6j2q/uRtOFMjd0iJwyH2KxEcF3Lq1+cJFC4h9LS5Oezncpu52cnTmYDLmeSadT1peNLigx8r39SR2Es0oDkTKKuPeLt6wzXCXJqh73118jaKPd3gv1ULkPsP752PjMyLKd4LiKkxemIbGQoo3WNOG2JMsdkQ7pXoWkdvmzjBX7zpRpHb5smW3JS/79oDL2g63TaPGJ3NUr6Orlv1w7V/t7FWHL/dnjLD3bv1nXW8Ng0vEA6XpwDQrBKs4qTU+EYBmtHXH+7oV2bFFs3vts5ezmhCx5srjnml76VNzbCARflUDBfeHtsS+ZxzbkXuLAkFlbI/Z9iyKh/pgH1UfcbMkwCWTbuWtqsigWqQvVUVk/qT2A/9tJGfa0oN/7CAqHE+7ONRGNRl1SqEcr3PUZPj5pG1mXS/MvB4v8RfKa4dFYrQG3i6EeDEFVsQb8WnI9vhPoEV3uqecQREZTy16zQ3OLmZ3BYvqBYmFy3VvyX8dWx0lwHpFiWMvmazQk7ZI5ZWkTm7IfMWVLeHu0zM4PyGB8fSXKY2Pcvm2IB+0HocRBUJMdFqvRGa26h hyJF12/8 dt4GhPLWTIohvMuuIDqwkP/Z2Wv8XS0kEzRY+UskaH2w5ghDn02utG0m35xPzwbe0BJbTW5MvHp385+rh4LTbJU5MNhpLYbCyiTjpA2LjfGbUSoV1acEpLwiobSTsR+seZcs2hy2mjPGTKOPQeU1EZKdoXFb2wKsM1tuM/NxcwebTdz2rBLs2ntkE6uB25OrsN3VKgKz1ArtVbN6cN63TK1Fk3JIb3g0vMpY7SA59INKflsE2gjPerAacfGR+DjfR6g9A3pfhDudCZB2CaEYmb3xFlB5/IcwdZNf9WJOc8bSnsLbSliAvZ03Zo+B8UUn3deBej5VcZkrB3eKj9ASO12qpqiSW/JshWY/K+YX2oLrWRR/SghrALjqV012MXt2R9xNmSVRyqb6Zh4FptUpifvgqwwCnlwh6NUWZ X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Hi Ryan, On Mon, 14 Oct 2024 at 13:02, Ryan Roberts wrote: > > When boot-time page size is in operation, TRAMP_VALIAS is no longer a > compile-time constant, because the VA of a fixmap slot depends upon > PAGE_SIZE. > > Let's handle this by instead exporting the slot index, > FIX_ENTRY_TRAMP_BEGIN,to assembly, then do the TRAMP_VALIAS calculation > per page size and use alternatives to decide which variant to activate. > > Note that for the tramp_map_kernel case, we are one instruction short of > space in the vector to have NOPs for all 3 page size variants. So we do > if/else for 16K/64K and branch around it for the 4K case. This saves 2 > instructions. > > Signed-off-by: Ryan Roberts > --- > > ***NOTE*** > Any confused maintainers may want to read the cover note here for context: > https://lore.kernel.org/all/20241014105514.3206191-1-ryan.roberts@arm.com/ > > arch/arm64/kernel/asm-offsets.c | 2 +- > arch/arm64/kernel/entry.S | 50 ++++++++++++++++++++++++++------- > 2 files changed, 41 insertions(+), 11 deletions(-) > > diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c > index f32b8d7f00b2a..c45fa3e281884 100644 > --- a/arch/arm64/kernel/asm-offsets.c > +++ b/arch/arm64/kernel/asm-offsets.c > @@ -172,7 +172,7 @@ int main(void) > DEFINE(ARM64_FTR_SYSVAL, offsetof(struct arm64_ftr_reg, sys_val)); > BLANK(); > #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 > - DEFINE(TRAMP_VALIAS, TRAMP_VALIAS); > + DEFINE(FIX_ENTRY_TRAMP_BEGIN, FIX_ENTRY_TRAMP_BEGIN); > #endif > #ifdef CONFIG_ARM_SDE_INTERFACE > DEFINE(SDEI_EVENT_INTREGS, offsetof(struct sdei_registered_event, interrupted_regs)); > diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S > index 7ef0e127b149f..ba47dc8672c04 100644 > --- a/arch/arm64/kernel/entry.S > +++ b/arch/arm64/kernel/entry.S > @@ -101,11 +101,27 @@ > .org .Lventry_start\@ + 128 // Did we overflow the ventry slot? > .endm > > +#define TRAMP_VALIAS(page_shift) (FIXADDR_TOP - (FIX_ENTRY_TRAMP_BEGIN << (page_shift))) > + > .macro tramp_alias, dst, sym > - .set .Lalias\@, TRAMP_VALIAS + \sym - .entry.tramp.text > - movz \dst, :abs_g2_s:.Lalias\@ > - movk \dst, :abs_g1_nc:.Lalias\@ > - movk \dst, :abs_g0_nc:.Lalias\@ > +alternative_if ARM64_USE_PAGE_SIZE_4K > + .set .Lalias4k\@, TRAMP_VALIAS(ARM64_PAGE_SHIFT_4K) + \sym - .entry.tramp.text > + movz \dst, :abs_g2_s:.Lalias4k\@ > + movk \dst, :abs_g1_nc:.Lalias4k\@ > + movk \dst, :abs_g0_nc:.Lalias4k\@ > +alternative_else_nop_endif > +alternative_if ARM64_USE_PAGE_SIZE_16K > + .set .Lalias16k\@, TRAMP_VALIAS(ARM64_PAGE_SHIFT_16K) + \sym - .entry.tramp.text > + movz \dst, :abs_g2_s:.Lalias16k\@ > + movk \dst, :abs_g1_nc:.Lalias16k\@ > + movk \dst, :abs_g0_nc:.Lalias16k\@ > +alternative_else_nop_endif > +alternative_if ARM64_USE_PAGE_SIZE_64K > + .set .Lalias64k\@, TRAMP_VALIAS(ARM64_PAGE_SHIFT_64K) + \sym - .entry.tramp.text > + movz \dst, :abs_g2_s:.Lalias64k\@ > + movk \dst, :abs_g1_nc:.Lalias64k\@ > + movk \dst, :abs_g0_nc:.Lalias64k\@ > +alternative_else_nop_endif Since you're changing these, might as well drop the middle movk as the fixmap is now always in the top 2 GiB of the VA space. However, wouldn't it be better to reuse the existing callback alternative stuff that Marc added for KVM? Same applies below, I reckon. > .endm > > /* > @@ -627,16 +643,30 @@ SYM_CODE_END(ret_to_user) > bic \tmp, \tmp, #USER_ASID_FLAG > msr ttbr1_el1, \tmp > #ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003 > -alternative_if ARM64_WORKAROUND_QCOM_FALKOR_E1003 > +alternative_if_not ARM64_WORKAROUND_QCOM_FALKOR_E1003 > + b .Lskip_falkor_e1003\@ > +alternative_else_nop_endif > /* ASID already in \tmp[63:48] */ > - movk \tmp, #:abs_g2_nc:(TRAMP_VALIAS >> 12) > - movk \tmp, #:abs_g1_nc:(TRAMP_VALIAS >> 12) > - /* 2MB boundary containing the vectors, so we nobble the walk cache */ > - movk \tmp, #:abs_g0_nc:((TRAMP_VALIAS & ~(SZ_2M - 1)) >> 12) > +alternative_if ARM64_USE_PAGE_SIZE_4K > + movk \tmp, #:abs_g2_nc:(TRAMP_VALIAS(ARM64_PAGE_SHIFT_4K) >> 12) > + movk \tmp, #:abs_g1_nc:(TRAMP_VALIAS(ARM64_PAGE_SHIFT_4K) >> 12) > + movk \tmp, #:abs_g0_nc:((TRAMP_VALIAS(ARM64_PAGE_SHIFT_4K) & ~(SZ_2M - 1)) >> 12) > + b .Lfinish_falkor_e1003\@ > +alternative_else_nop_endif > +alternative_if ARM64_USE_PAGE_SIZE_16K > + movk \tmp, #:abs_g2_nc:(TRAMP_VALIAS(ARM64_PAGE_SHIFT_16K) >> 12) > + movk \tmp, #:abs_g1_nc:(TRAMP_VALIAS(ARM64_PAGE_SHIFT_16K) >> 12) > + movk \tmp, #:abs_g0_nc:((TRAMP_VALIAS(ARM64_PAGE_SHIFT_16K) & ~(SZ_2M - 1)) >> 12) > +alternative_else /* ARM64_USE_PAGE_SIZE_64K */ > + movk \tmp, #:abs_g2_nc:(TRAMP_VALIAS(ARM64_PAGE_SHIFT_64K) >> 12) > + movk \tmp, #:abs_g1_nc:(TRAMP_VALIAS(ARM64_PAGE_SHIFT_64K) >> 12) > + movk \tmp, #:abs_g0_nc:((TRAMP_VALIAS(ARM64_PAGE_SHIFT_64K) & ~(SZ_2M - 1)) >> 12) > +alternative_endif > +.Lfinish_falkor_e1003\@: > isb > tlbi vae1, \tmp > dsb nsh > -alternative_else_nop_endif > +.Lskip_falkor_e1003\@: > #endif /* CONFIG_QCOM_FALKOR_ERRATUM_1003 */ > .endm > > -- > 2.43.0 >