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From: Andy Lutomirski <luto@kernel.org>
Date: Wed, 18 Apr 2018 17:44:56 -0700
Message-ID: <CALCETrWYdug6cY_ZjGPV19baFWb_VZxMHGmfxnoJfnXP7z=1Sg@mail.gmail.com>
Subject: Re: [PATCH 03/35] x86/entry/32: Load task stack from x86_tss.sp1 in
 SYSENTER handler
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To: Andi Kleen <ak@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>, Joerg Roedel <joro@8bytes.org>, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>, the arch/x86 maintainers <x86@kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, linux-mm <linux-mm@kvack.org>, Andy Lutomirski <luto@kernel.org>, Dave Hansen <dave.hansen@intel.com>, Josh Poimboeuf <jpoimboe@redhat.com>, Juergen Gross <jgross@suse.com>, Peter Zijlstra <peterz@infradead.org>, Borislav Petkov <bp@alien8.de>, Jiri Kosina <jkosina@suse.cz>, Boris Ostrovsky <boris.ostrovsky@oracle.com>, Brian Gerst <brgerst@gmail.com>, David Laight <David.Laight@aculab.com>, Denys Vlasenko <dvlasenk@redhat.com>, Eduardo Valentin <eduval@amazon.com>, Greg KH <gregkh@linuxfoundation.org>, Will Deacon <will.deacon@arm.com>, "Liguori, Anthony" <aliguori@amazon.com>, Daniel Gruss <daniel.gruss@iaik.tugraz.at>, Hugh Dickins <hughd@google.com>, Kees Cook <keescook@google.com>, Andrea Arcangeli <aarcange@redhat.com>, Waim@linux.intel.com

On Wed, Apr 18, 2018 at 5:38 PM, Andi Kleen <ak@linux.intel.com> wrote:
> On Wed, Apr 18, 2018 at 05:02:02PM -0700, Linus Torvalds wrote:
>> On Wed, Apr 18, 2018 at 4:26 PM, Andi Kleen <ak@linux.intel.com> wrote:
>> >
>> > Seems like a hack. Why can't that be stored in a per cpu variable?
>>
>> It *is* a percpu variable - the whole x86_tss structure is percpu.
>>
>> I guess it could be a different (separate) percpu variable, but might
>> as well use the space we already have allocated.
>
> Would be better/cleaner to use a separate variable instead of reusing
> x86 structures like this. Who knows what subtle side effects that
> may have eventually.


This variable is extremely hot, and it=E2=80=99s used under the same
circumstances as sp0, so sharing a cache line makes sense. And x86_64
works this way.

>
> It will be also easier to understand in the code.

I suppose it could go right before the TSS, but then we have potential
alignment issues.  We could also muck with unions to give the field an
alternative, clearer name, I suppose.  But this patch should go in
regardless and any cleanups should be done on x86_32 and x86_64
simultaneously, I think.