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From: Andy Lutomirski <luto@amacapital.net>
To: "Elliott, Robert (Server Storage)" <Elliott@hp.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	"Kani, Toshimitsu" <toshi.kani@hp.com>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"akpm@linux-foundation.org" <akpm@linux-foundation.org>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"jgross@suse.com" <jgross@suse.com>,
	"stefan.bader@canonical.com" <stefan.bader@canonical.com>,
	"hmh@hmh.eng.br" <hmh@hmh.eng.br>,
	"yigal@plexistor.com" <yigal@plexistor.com>,
	"konrad.wilk@oracle.com" <konrad.wilk@oracle.com>
Subject: Re: [PATCH v4 4/7] x86, mm, pat: Add pgprot_writethrough() for WT
Date: Tue, 4 Nov 2014 07:22:49 -0800	[thread overview]
Message-ID: <CALCETrWAU+mH0Ss7jgKXcoS=wVet5o=hP2iqz9H15+KSyq=Y-A@mail.gmail.com> (raw)
In-Reply-To: <94D0CD8314A33A4D9D801C0FE68B40295936556E@G4W3202.americas.hpqcorp.net>

On Mon, Nov 3, 2014 at 7:34 PM, Elliott, Robert (Server Storage)
<Elliott@hp.com> wrote:
>
>
>> -----Original Message-----
>> From: Andy Lutomirski [mailto:luto@amacapital.net]
>> Sent: Monday, November 03, 2014 5:01 PM
>> To: Thomas Gleixner
>> Cc: Kani, Toshimitsu; Elliott, Robert (Server Storage); hpa@zytor.com;
>> mingo@redhat.com; akpm@linux-foundation.org; arnd@arndb.de; linux-
>> mm@kvack.org; linux-kernel@vger.kernel.org; jgross@suse.com;
>> stefan.bader@canonical.com; hmh@hmh.eng.br; yigal@plexistor.com;
>> konrad.wilk@oracle.com
>> Subject: Re: [PATCH v4 4/7] x86, mm, pat: Add pgprot_writethrough() for
>> WT
>>
>> On Mon, Nov 3, 2014 at 2:53 PM, Thomas Gleixner <tglx@linutronix.de>
>> wrote:
> ...
>> On the other hand, I thought that _GPL was supposed to be more about
>> whether the thing using it is inherently a derived work of the Linux
>> kernel.  Since WT is an Intel concept, not a Linux concept, then I
>> think that this is a hard argument to make.
>
> IBM System/360 Model 85 (1968) had write-through (i.e., store-through)
> caching.  Intel might claim Write Combining, though.
>

Arguably WC is, and was, mostly a hack to enable full cacheline writes
without an instruction to do it directly.  x86 has such an instruction
now, so WC is less necessary.

In any event, my point wasn't that Intel should get any particular
credit here; it's that this is really a straightforward interface to
program a hardware feature that predates the interface.

--Andy

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  reply	other threads:[~2014-11-04 15:23 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-27 22:55 [PATCH v4 0/7] Support Write-Through mapping on x86 Toshi Kani
2014-10-27 22:55 ` [PATCH v4 1/7] x86, mm, pat: Set WT to PA7 slot of PAT MSR Toshi Kani
2014-11-03 17:14   ` Thomas Gleixner
2014-11-03 17:47     ` Toshi Kani
2014-11-03 18:08       ` Andy Lutomirski
2014-11-03 18:01         ` Toshi Kani
2014-11-03 18:15         ` Thomas Gleixner
2014-11-03 18:08           ` Toshi Kani
2014-10-27 22:55 ` [PATCH v4 2/7] x86, mm, pat: Change reserve_memtype() to handle WT Toshi Kani
2014-11-03 18:27   ` Thomas Gleixner
2014-11-03 18:57     ` Toshi Kani
2014-10-27 22:55 ` [PATCH v4 3/7] x86, mm, asm-gen: Add ioremap_wt() for WT Toshi Kani
2014-10-27 22:55 ` [PATCH v4 4/7] x86, mm, pat: Add pgprot_writethrough() " Toshi Kani
2014-11-03 22:10   ` Elliott, Robert (Server Storage)
2014-11-03 22:15     ` Toshi Kani
2014-11-03 22:53       ` Thomas Gleixner
2014-11-03 23:01         ` Andy Lutomirski
2014-11-03 23:32           ` Thomas Gleixner
2014-11-04  3:34           ` Elliott, Robert (Server Storage)
2014-11-04 15:22             ` Andy Lutomirski [this message]
2014-11-04  0:50         ` Toshi Kani
2014-10-27 22:55 ` [PATCH v4 5/7] x86, mm, pat: Refactor !pat_enabled handling Toshi Kani
2014-11-03 19:01   ` Thomas Gleixner
2014-11-03 19:09     ` Toshi Kani
2014-10-27 22:55 ` [PATCH v4 6/7] x86, mm, asm: Add WT support to set_page_memtype() Toshi Kani
2014-10-27 22:55 ` [PATCH v4 7/7] x86, mm: Add set_memory_wt() for WT Toshi Kani

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