From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f198.google.com (mail-pf0-f198.google.com [209.85.192.198]) by kanga.kvack.org (Postfix) with ESMTP id EF6226B0033 for ; Wed, 17 Jan 2018 13:12:54 -0500 (EST) Received: by mail-pf0-f198.google.com with SMTP id s22so3158417pfh.21 for ; Wed, 17 Jan 2018 10:12:54 -0800 (PST) Received: from mail.kernel.org (mail.kernel.org. [198.145.29.99]) by mx.google.com with ESMTPS id p2si4830537plo.798.2018.01.17.10.12.53 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 Jan 2018 10:12:53 -0800 (PST) Received: from mail-io0-f176.google.com (mail-io0-f176.google.com [209.85.223.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7376D21742 for ; Wed, 17 Jan 2018 18:12:53 +0000 (UTC) Received: by mail-io0-f176.google.com with SMTP id f34so16592883ioi.13 for ; Wed, 17 Jan 2018 10:12:53 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <20180117141006.GR28161@8bytes.org> References: <1516120619-1159-1-git-send-email-joro@8bytes.org> <1516120619-1159-4-git-send-email-joro@8bytes.org> <20180117092442.GJ28161@8bytes.org> <20180117141006.GR28161@8bytes.org> From: Andy Lutomirski Date: Wed, 17 Jan 2018 10:12:32 -0800 Message-ID: Subject: Re: [PATCH 03/16] x86/entry/32: Leave the kernel via the trampoline stack Content-Type: text/plain; charset="UTF-8" Sender: owner-linux-mm@kvack.org List-ID: To: Joerg Roedel Cc: Brian Gerst , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , X86 ML , LKML , Linux-MM , Linus Torvalds , Dave Hansen , Josh Poimboeuf , Juergen Gross , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , David Laight , Denys Vlasenko , Eduardo Valentin , Greg KH , Will Deacon , "Liguori, Anthony" , Daniel Gruss , Hugh Dickins , Kees Cook , Andrea Arcangeli , Waiman Long , Joerg Roedel On Wed, Jan 17, 2018 at 6:10 AM, Joerg Roedel wrote: > On Wed, Jan 17, 2018 at 05:57:53AM -0800, Brian Gerst wrote: >> On Wed, Jan 17, 2018 at 1:24 AM, Joerg Roedel wrote: > >> > I have no real idea on how to switch back to the entry stack without >> > access to per_cpu variables. I also can't access the cpu_entry_area for >> > the cpu yet, because for that we need to be on the entry stack already. >> >> Switch to the trampoline stack before loading user segments. > > That requires to copy most of pt_regs from task- to trampoline-stack, > not sure if that is faster than temporily restoring kernel %fs. > I would optimize for simplicity, not speed. You're already planning to write to CR3, which is serializing, blows away the TLB, *and* takes the absurdly large amount of time that the microcode needs to blow away the TLB. (For whatever reason, Intel doesn't seem to have hardware that can quickly wipe the TLB. I suspect that the actual implementation does it in a loop and wipes little pieces at a time. Whatever it actually does, the CR3 write itself is very slow.) -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org