From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-la0-f48.google.com (mail-la0-f48.google.com [209.85.215.48]) by kanga.kvack.org (Postfix) with ESMTP id 8C0256B0068 for ; Tue, 8 Apr 2014 00:04:55 -0400 (EDT) Received: by mail-la0-f48.google.com with SMTP id gf5so321367lab.7 for ; Mon, 07 Apr 2014 21:04:54 -0700 (PDT) Received: from mail-lb0-f180.google.com (mail-lb0-f180.google.com [209.85.217.180]) by mx.google.com with ESMTPS id sz4si367710lbb.204.2014.04.07.21.04.53 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 07 Apr 2014 21:04:54 -0700 (PDT) Received: by mail-lb0-f180.google.com with SMTP id 10so318731lbg.25 for ; Mon, 07 Apr 2014 21:04:53 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20140407212535.GJ7292@suse.de> References: <1396883443-11696-1-git-send-email-mgorman@suse.de> <1396883443-11696-3-git-send-email-mgorman@suse.de> <5342C517.2020305@citrix.com> <20140407154935.GD7292@suse.de> <20140407161910.GJ1444@moon> <20140407182854.GH7292@suse.de> <5342FC0E.9080701@zytor.com> <20140407193646.GC23983@moon> <5342FFB0.6010501@zytor.com> <20140407212535.GJ7292@suse.de> Date: Mon, 7 Apr 2014 21:04:53 -0700 Message-ID: Subject: Re: [PATCH 2/3] x86: Define _PAGE_NUMA with unused physical address bits PMD and PTE levels From: Steven Noonan Content-Type: text/plain; charset=UTF-8 Sender: owner-linux-mm@kvack.org List-ID: To: Mel Gorman Cc: "H. Peter Anvin" , Cyrill Gorcunov , David Vrabel , Linus Torvalds , Ingo Molnar , Rik van Riel , Andrew Morton , Peter Zijlstra , Andrea Arcangeli , Linux-MM , Linux-X86 , LKML , Pavel Emelyanov On Mon, Apr 7, 2014 at 2:25 PM, Mel Gorman wrote: > On Mon, Apr 07, 2014 at 12:42:40PM -0700, H. Peter Anvin wrote: >> On 04/07/2014 12:36 PM, Cyrill Gorcunov wrote: >> > On Mon, Apr 07, 2014 at 12:27:10PM -0700, H. Peter Anvin wrote: >> >> On 04/07/2014 11:28 AM, Mel Gorman wrote: >> >>> >> >>> I had considered the soft-dirty tracking usage of the same bit. I thought I'd >> >>> be able to swizzle around it or a further worst case of having soft-dirty and >> >>> automatic NUMA balancing mutually exclusive. Unfortunately upon examination >> >>> it's not obvious how to have both of them share a bit and I suspect any >> >>> attempt to will break CRIU. In my current tree, NUMA_BALANCING cannot be >> >>> set if MEM_SOFT_DIRTY which is not particularly satisfactory. Next on the >> >>> list is examining if _PAGE_BIT_IOMAP can be used. >> >> >> >> Didn't we smoke the last user of _PAGE_BIT_IOMAP? >> > >> > Seems so, at least for non-kernel pages (not considering this bit references in >> > xen code, which i simply don't know but i guess it's used for kernel pages only). >> > >> >> David Vrabel has a patchset which I presumed would be pulled through the >> Xen tree this merge window: >> >> [PATCHv5 0/8] x86/xen: fixes for mapping high MMIO regions (and remove >> _PAGE_IOMAP) >> >> That frees up this bit. >> > > Thanks, I was not aware of that patch. Based on it, I intend to force > automatic NUMA balancing to depend on !XEN and see what the reaction is. If > support for Xen is really required then it potentially be re-enabled if/when > that series is merged assuming they do not need the bit for something else. > Amazon EC2 does have large memory instance types with NUMA exposed to the guest (e.g. c3.8xlarge, i2.8xlarge, etc), so it'd be preferable (to me anyway) if we didn't require !XEN. -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org