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[209.85.220.65]) by mx.google.com with SMTPS id f17sor1433184ljg.16.2019.05.22.16.09.43 for (Google Transport Security); Wed, 22 May 2019 16:09:44 -0700 (PDT) Received-SPF: pass (google.com: domain of enh@google.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=igi2ZowC; spf=pass (google.com: domain of enh@google.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=enh@google.com; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Zo0ta7cFHgMRhNj415CGcWxBRhsPIdMQaFfQkNGZDyg=; b=igi2ZowCRR3eZ9/0nTV8cXZJb9K3GEJ6nM7xrdpCgyuIedU5DlpD8BYtYq2g7fhIK6 FMPk+pIR3l66HCoBcqnR8RLDUlNVKBoDdSOOKbybJMa8cIyuAzuBD0XVwoayLR91TP1S Or9Vm+AM1MqvKUg9+c3gOd7GP47AnzQE07FfPqL0gIQFQsaz6/Wtl6TltaTcvzbkWmzx nUHyczH55lHnf4QLfD7YMKsWm2P4/KbXTCsRnYy/LgXeL0UQ2MOisKGH9I79sJSp7fTc mCIju+QQoBZwdM0ZHmLkXpay4k0e/6JiSlhqZI0PrF8znz18Mpt9AP9bfE2L3yEv2l8R 69MQ== X-Google-Smtp-Source: APXvYqyzdpKdhtViUHlA5ZulCPuE1mR7dT316mPXUNWFyB1kZFy9VtMEAzPhqeN7WBqyKU4f463JOkqzDuNZUlPEoK8= X-Received: by 2002:a2e:885a:: with SMTP id z26mr2119940ljj.35.1558566583161; Wed, 22 May 2019 16:09:43 -0700 (PDT) MIME-Version: 1.0 References: <20190517144931.GA56186@arrakis.emea.arm.com> <20190521182932.sm4vxweuwo5ermyd@mbp> <201905211633.6C0BF0C2@keescook> <20190522101110.m2stmpaj7seezveq@mbp> <20190522163527.rnnc6t4tll7tk5zw@mbp> <201905221316.865581CF@keescook> In-Reply-To: From: enh Date: Wed, 22 May 2019 16:09:31 -0700 Message-ID: Subject: Re: [PATCH v15 00/17] arm64: untag user pointers passed to the kernel To: Evgenii Stepanov Cc: Kees Cook , Catalin Marinas , Andrey Konovalov , Khalid Aziz , Linux ARM , Linux Memory Management List , LKML , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-rdma@vger.kernel.org, linux-media@vger.kernel.org, kvm@vger.kernel.org, "open list:KERNEL SELFTEST FRAMEWORK" , Vincenzo Frascino , Will Deacon , Mark Rutland , Andrew Morton , Greg Kroah-Hartman , Yishai Hadas , Felix Kuehling , Alexander Deucher , Christian Koenig , Mauro Carvalho Chehab , Jens Wiklander , Alex Williamson , Leon Romanovsky , Dmitry Vyukov , Kostya Serebryany , Lee Smith , Ramana Radhakrishnan , Jacob Bramley , Ruben Ayrapetyan , Robin Murphy , Luc Van Oostenryck , Dave Martin , Kevin Brodsky , Szabolcs Nagy Content-Type: text/plain; charset="UTF-8" X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Wed, May 22, 2019 at 4:03 PM Evgenii Stepanov wrote: > > On Wed, May 22, 2019 at 1:47 PM Kees Cook wrote: > > > > On Wed, May 22, 2019 at 05:35:27PM +0100, Catalin Marinas wrote: > > > The two hard requirements I have for supporting any new hardware feature > > > in Linux are (1) a single kernel image binary continues to run on old > > > hardware while making use of the new feature if available and (2) old > > > user space continues to run on new hardware while new user space can > > > take advantage of the new feature. > > > > Agreed! And I think the series meets these requirements, yes? > > > > > For MTE, we just can't enable it by default since there are applications > > > who use the top byte of a pointer and expect it to be ignored rather > > > than failing with a mismatched tag. Just think of a hwasan compiled > > > binary where TBI is expected to work and you try to run it with MTE > > > turned on. > > > > Ah! Okay, here's the use-case I wasn't thinking of: the concern is TBI > > conflicting with MTE. And anything that starts using TBI suddenly can't > > run in the future because it's being interpreted as MTE bits? (Is that > > the ABI concern? I feel like we got into the weeds about ioctl()s and > > one-off bugs...) > > > > So there needs to be some way to let the kernel know which of three > > things it should be doing: > > 1- leaving userspace addresses as-is (present) > > 2- wiping the top bits before using (this series) > > 3- wiping the top bits for most things, but retaining them for MTE as > > needed (the future) > > > > I expect MTE to be the "default" in the future. Once a system's libc has > > grown support for it, everything will be trying to use MTE. TBI will be > > the special case (but TBI is effectively a prerequisite). > > > > AFAICT, the only difference I see between 2 and 3 will be the tag handling > > in usercopy (all other places will continue to ignore the top bits). Is > > that accurate? > > > > Is "1" a per-process state we want to keep? (I assume not, but rather it > > is available via no TBI/MTE CONFIG or a boot-time option, if at all?) > > > > To choose between "2" and "3", it seems we need a per-process flag to > > opt into TBI (and out of MTE). For userspace, how would a future binary > > choose TBI over MTE? If it's a library issue, we can't use an ELF bit, > > since the choice may be "late" after ELF load (this implies the need > > for a prctl().) If it's binary-only ("built with HWKASan") then an ELF > > bit seems sufficient. And without the marking, I'd expect the kernel to > > enforce MTE when there are high bits. > > > > > I would also expect the C library or dynamic loader to check for the > > > presence of a HWCAP_MTE bit before starting to tag memory allocations, > > > otherwise it would get SIGILL on the first MTE instruction it tries to > > > execute. > > > > I've got the same question as Elliot: aren't MTE instructions just NOP > > to older CPUs? I.e. if the CPU (or kernel) don't support it, it just > > gets entirely ignored: checking is only needed to satisfy curiosity > > or behavioral expectations. > > MTE instructions are not NOP. Most of them have side effects (changing > register values, zeroing memory). no, i meant "they're encoded in a space that was previously no-ops, so running on MTE code on old hardware doesn't cause SIGILL". > This only matters for stack tagging, though. Heap tagging is a runtime > decision in the allocator. > > If an image needs to run on old hardware, it will have to do heap tagging only. > > > To me, the conflict seems to be using TBI in the face of expecting MTE to > > be the default state of the future. (But the internal changes needed > > for TBI -- this series -- is a prereq for MTE.) > > > > -- > > Kees Cook