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Wed, 18 Oct 2023 05:17:45 -0700 (PDT) Received: from 348282803490 named unknown by gmailapi.google.com with HTTPREST; Wed, 18 Oct 2023 05:17:44 -0700 From: Emil Renner Berthing In-Reply-To: <20231017-module_relocations-v4-1-937f5ef316f0@rivosinc.com> References: <20231017-module_relocations-v4-0-937f5ef316f0@rivosinc.com> <20231017-module_relocations-v4-1-937f5ef316f0@rivosinc.com> Mime-Version: 1.0 Date: Wed, 18 Oct 2023 05:17:44 -0700 Message-ID: Subject: Re: [PATCH v4 1/2] riscv: Add remaining module relocations To: Charlie Jenkins , linux-riscv@lists.infradead.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org Cc: Eric Biederman , Kees Cook , Paul Walmsley , Palmer Dabbelt , Albert Ou Content-Type: text/plain; charset="UTF-8" X-Rspamd-Server: rspam08 X-Rspamd-Queue-Id: 5686B1A001B X-Stat-Signature: qbdhqfemaf46is3qz8s7yst36pge8rjo X-Rspam-User: X-HE-Tag: 1697631469-298610 X-HE-Meta: U2FsdGVkX19WP8EiPdrA0dGE7/EuIZ8XoHcxQK6j3dHCVCLtQXDWjBT1ghdoWI7HvjjVy23jjaRZ6MRUlLy6vEHs7kfmSeFjK7GQMYQO3SZdwj5EabGhpjkvxCCtap1UkqnfO4R/vv0VZ9Qgc9ITcmVdZa+uNsbyc1uKEP/lXj0hYacoR69L9jciyTMVJ1dWeESkLDjhOa57qXIVMRPtYMu2/9rkpbDFcBKqRcb5z6SLi3VUc6piLBeX2X4WYfG1nmjPWvPT4I90cWCr0FY6sOda+Eit+jpaB13YPul0WN78BkubhO0NxH4mVJDDhSP/s/qjU7Bo0pXrkg934L/a8l8kU8EMPp2dC+dgN4P90C1XGJ4V8OpaZqrRawEAHpfwRROSXyQyzaMlkUMqSDIF/Mg2DQBlA4R2RoRKaggMlvfY/KwF6UyuJdzIMpXMYRRjfva1HhxZ2tO/qf4kd9a2zSk92vJVw+bwHlPoLSIcnS4L2d2NLbZSvb+AOr0Jt6U3g2DxnyomsU5udqdHJYOspLjaH47uCDjfyI7nIlJEcOouIynJFPAJP2zOdKAGggxLN/d6ZhqgrcIfdzY70eQsnHhnELisMHwDAYCtoDEV4FybITAjdI/r1QUZkBKJthHvgPb7Xgq6U0MWZlR7RfCFvNOOuMQj4ME/eRjN65QtZzUSyzWtIQcHL+4TWM2bFpVSoRkG5lnZfBLfGYea5b9OCtwO/MiMEvkkfnM0SLlcqk8xoUUP2PCbH+RxxaYd6tA/2LPTmBq0NrAnzlV+2X9N6ZgoTVF1Whb7aNZvRgWEq9vBHeCP25N924th+V+HSCvjgqSSCN0H6hkGNwJBwbj4YA9LW0RGHRxwh0s335aWXvfokxN4NKdOACRKrz+Q43Qu5u0NhxHRPJzvWjp2MCwuGjV/hEeY69NGv19nFMUMgoFRFmLNgS/SmkDfI5GDjep/jxUaUY7JRxBhpXYAkWF F27ItRei /HYpn4YfTBx6Sv39BNiCqc0wlFdlc3paXn589iIFaoApZdmqLVC6QWv1KQvTJY1RNvZxrYR2k1hVdzZF1DB6FVDNzta1oMuRDa1ucIVbWSGlUn3IRhpSE0sN0RLjlamcwYktEUMvs3nJQqR0/eu1ELjcw5pqqhzNI2Tvf5XbovpcM9Xb00ApebfsznoHWgpnXjHY68VT874bu0OcOcYKT86sOArK8Dnp3xJMzes7wvocQS7BuDgV60LXXZ/as+5sdlqB1t2mPu6eyFRvMEQTpp53+lNp5WP3irhMPQqPaqHFBAB3QlQrOg/nRKQDgw89DkaiB3sZxxOzYMGrG0nZDsjwt17YKCdnOJKN54LhElszk1mrzShRYZ8+8THrKnY4+wQz3M0ewQ+O8Ipyz2fDCGq0Y1Uc1GDEwBbqNAEXRKBMouWnLfJQjY+Ik40C3BHz0x1aqVywrV8NZLYtw1l8lQEjLfAJX7i8cXUSOIWwZqSJmXtw= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Charlie Jenkins wrote: > Add all final module relocations and add error logs explaining the ones > that are not supported. > > Signed-off-by: Charlie Jenkins > --- > arch/riscv/include/uapi/asm/elf.h | 5 +- > arch/riscv/kernel/module.c | 207 +++++++++++++++++++++++++++++++++----- > 2 files changed, 186 insertions(+), 26 deletions(-) > > diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h > index d696d6610231..11a71b8533d5 100644 > --- a/arch/riscv/include/uapi/asm/elf.h > +++ b/arch/riscv/include/uapi/asm/elf.h > @@ -49,6 +49,7 @@ typedef union __riscv_fp_state elf_fpregset_t; > #define R_RISCV_TLS_DTPREL64 9 > #define R_RISCV_TLS_TPREL32 10 > #define R_RISCV_TLS_TPREL64 11 > +#define R_RISCV_IRELATIVE 58 > > /* Relocation types not used by the dynamic linker */ > #define R_RISCV_BRANCH 16 > @@ -81,7 +82,6 @@ typedef union __riscv_fp_state elf_fpregset_t; > #define R_RISCV_ALIGN 43 > #define R_RISCV_RVC_BRANCH 44 > #define R_RISCV_RVC_JUMP 45 > -#define R_RISCV_LUI 46 > #define R_RISCV_GPREL_I 47 > #define R_RISCV_GPREL_S 48 > #define R_RISCV_TPREL_I 49 > @@ -93,6 +93,9 @@ typedef union __riscv_fp_state elf_fpregset_t; > #define R_RISCV_SET16 55 > #define R_RISCV_SET32 56 > #define R_RISCV_32_PCREL 57 > +#define R_RISCV_PLT32 59 > +#define R_RISCV_SET_ULEB128 60 > +#define R_RISCV_SUB_ULEB128 61 > > > #endif /* _UAPI_ASM_RISCV_ELF_H */ > diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c > index 7c651d55fcbd..e860726352ac 100644 > --- a/arch/riscv/kernel/module.c > +++ b/arch/riscv/kernel/module.c > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -268,6 +269,12 @@ static int apply_r_riscv_align_rela(struct module *me, u32 *location, > return -EINVAL; > } > > +static int apply_r_riscv_add8_rela(struct module *me, u32 *location, Elf_Addr v) > +{ > + *(u8 *)location += (u8)v; > + return 0; > +} > + > static int apply_r_riscv_add16_rela(struct module *me, u32 *location, > Elf_Addr v) > { > @@ -289,6 +296,12 @@ static int apply_r_riscv_add64_rela(struct module *me, u32 *location, > return 0; > } > > +static int apply_r_riscv_sub8_rela(struct module *me, u32 *location, Elf_Addr v) > +{ > + *(u8 *)location -= (u8)v; > + return 0; > +} > + > static int apply_r_riscv_sub16_rela(struct module *me, u32 *location, > Elf_Addr v) > { > @@ -310,31 +323,149 @@ static int apply_r_riscv_sub64_rela(struct module *me, u32 *location, > return 0; > } > > -static int (*reloc_handlers_rela[]) (struct module *me, u32 *location, > - Elf_Addr v) = { > - [R_RISCV_32] = apply_r_riscv_32_rela, > - [R_RISCV_64] = apply_r_riscv_64_rela, > - [R_RISCV_BRANCH] = apply_r_riscv_branch_rela, > - [R_RISCV_JAL] = apply_r_riscv_jal_rela, > - [R_RISCV_RVC_BRANCH] = apply_r_riscv_rvc_branch_rela, > - [R_RISCV_RVC_JUMP] = apply_r_riscv_rvc_jump_rela, > - [R_RISCV_PCREL_HI20] = apply_r_riscv_pcrel_hi20_rela, > - [R_RISCV_PCREL_LO12_I] = apply_r_riscv_pcrel_lo12_i_rela, > - [R_RISCV_PCREL_LO12_S] = apply_r_riscv_pcrel_lo12_s_rela, > - [R_RISCV_HI20] = apply_r_riscv_hi20_rela, > - [R_RISCV_LO12_I] = apply_r_riscv_lo12_i_rela, > - [R_RISCV_LO12_S] = apply_r_riscv_lo12_s_rela, > - [R_RISCV_GOT_HI20] = apply_r_riscv_got_hi20_rela, > - [R_RISCV_CALL_PLT] = apply_r_riscv_call_plt_rela, > - [R_RISCV_CALL] = apply_r_riscv_call_rela, > - [R_RISCV_RELAX] = apply_r_riscv_relax_rela, > - [R_RISCV_ALIGN] = apply_r_riscv_align_rela, > - [R_RISCV_ADD16] = apply_r_riscv_add16_rela, > - [R_RISCV_ADD32] = apply_r_riscv_add32_rela, > - [R_RISCV_ADD64] = apply_r_riscv_add64_rela, > - [R_RISCV_SUB16] = apply_r_riscv_sub16_rela, > - [R_RISCV_SUB32] = apply_r_riscv_sub32_rela, > - [R_RISCV_SUB64] = apply_r_riscv_sub64_rela, > +static int dynamic_linking_not_supported(struct module *me, u32 *location, > + Elf_Addr v) > +{ > + pr_err("%s: Dynamic linking not supported in kernel modules PC = %p\n", > + me->name, location); > + return -EINVAL; > +} > + > +static int tls_not_supported(struct module *me, u32 *location, Elf_Addr v) > +{ > + pr_err("%s: Thread local storage not supported in kernel modules PC = %p\n", > + me->name, location); > + return -EINVAL; > +} > + > +static int apply_r_riscv_sub6_rela(struct module *me, u32 *location, Elf_Addr v) > +{ > + *(u8 *)location = (*location - ((u8)v & 0x3F)) & 0x3F; > + return 0; > +} > + > +static int apply_r_riscv_set6_rela(struct module *me, u32 *location, Elf_Addr v) > +{ > + *(u8 *)location = (*(u8 *)location & 0xc0) | ((u8)v & 0x3F); > + return 0; > +} > + > +static int apply_r_riscv_set8_rela(struct module *me, u32 *location, Elf_Addr v) > +{ > + *(u8 *)location = (u8)v; > + return 0; > +} > + > +static int apply_r_riscv_set16_rela(struct module *me, u32 *location, > + Elf_Addr v) > +{ > + *(u16 *)location = (u16)v; > + return 0; > +} > + > +static int apply_r_riscv_set32_rela(struct module *me, u32 *location, > + Elf_Addr v) > +{ > + *(u32 *)location = (u32)v; > + return 0; > +} > + > +static int apply_r_riscv_32_pcrel_rela(struct module *me, u32 *location, > + Elf_Addr v) > +{ > + *(u32 *)location = (u32)v; > + return 0; > +} > + > +static int apply_r_riscv_plt32_rela(struct module *me, u32 *location, > + Elf_Addr v) > +{ > + *(u32 *)location = (u32)v; > + return 0; > +} > + > +static int apply_r_riscv_set_uleb128(struct module *me, u32 *location, Elf_Addr v) > +{ > + /* > + * Relocation is only performed if R_RISCV_SET_ULEB128 is followed by > + * R_RISCV_SUB_ULEB128 so do computation there > + */ > + return 0; > +} > + > +static int apply_r_riscv_sub_uleb128(struct module *me, u32 *location, Elf_Addr v) > +{ > + if (v >= 128) { > + pr_err("%s: uleb128 must be in [0, 127] (not %ld) at PC = %p\n", > + me->name, (unsigned long)v, location); > + return -EINVAL; > + } > + > + *location = v; > + return 0; > +} > + > +/* > + * Relocations defined in the riscv-elf-psabi-doc. > + * This handles static linking only. > + */ > +static int (*reloc_handlers_rela[])(struct module *me, u32 *location, > + Elf_Addr v) = { > + [R_RISCV_32] = apply_r_riscv_32_rela, > + [R_RISCV_64] = apply_r_riscv_64_rela, > + [R_RISCV_RELATIVE] = dynamic_linking_not_supported, > + [R_RISCV_COPY] = dynamic_linking_not_supported, > + [R_RISCV_JUMP_SLOT] = dynamic_linking_not_supported, > + [R_RISCV_TLS_DTPMOD32] = dynamic_linking_not_supported, > + [R_RISCV_TLS_DTPMOD64] = dynamic_linking_not_supported, > + [R_RISCV_TLS_DTPREL32] = dynamic_linking_not_supported, > + [R_RISCV_TLS_DTPREL64] = dynamic_linking_not_supported, > + [R_RISCV_TLS_TPREL32] = dynamic_linking_not_supported, > + [R_RISCV_TLS_TPREL64] = dynamic_linking_not_supported, > + /* 12-15 undefined */ > + [R_RISCV_BRANCH] = apply_r_riscv_branch_rela, > + [R_RISCV_JAL] = apply_r_riscv_jal_rela, > + [R_RISCV_CALL] = apply_r_riscv_call_rela, > + [R_RISCV_CALL_PLT] = apply_r_riscv_call_plt_rela, > + [R_RISCV_GOT_HI20] = apply_r_riscv_got_hi20_rela, > + [R_RISCV_TLS_GOT_HI20] = tls_not_supported, > + [R_RISCV_TLS_GD_HI20] = tls_not_supported, > + [R_RISCV_PCREL_HI20] = apply_r_riscv_pcrel_hi20_rela, > + [R_RISCV_PCREL_LO12_I] = apply_r_riscv_pcrel_lo12_i_rela, > + [R_RISCV_PCREL_LO12_S] = apply_r_riscv_pcrel_lo12_s_rela, > + [R_RISCV_HI20] = apply_r_riscv_hi20_rela, > + [R_RISCV_LO12_I] = apply_r_riscv_lo12_i_rela, > + [R_RISCV_LO12_S] = apply_r_riscv_lo12_s_rela, > + [R_RISCV_TPREL_HI20] = tls_not_supported, > + [R_RISCV_TPREL_LO12_I] = tls_not_supported, > + [R_RISCV_TPREL_LO12_S] = tls_not_supported, > + [R_RISCV_TPREL_ADD] = tls_not_supported, > + [R_RISCV_ADD8] = apply_r_riscv_add8_rela, > + [R_RISCV_ADD16] = apply_r_riscv_add16_rela, > + [R_RISCV_ADD32] = apply_r_riscv_add32_rela, > + [R_RISCV_ADD64] = apply_r_riscv_add64_rela, > + [R_RISCV_SUB8] = apply_r_riscv_sub8_rela, > + [R_RISCV_SUB16] = apply_r_riscv_sub16_rela, > + [R_RISCV_SUB32] = apply_r_riscv_sub32_rela, > + [R_RISCV_SUB64] = apply_r_riscv_sub64_rela, > + /* 41-42 reserved for future standard use */ > + [R_RISCV_ALIGN] = apply_r_riscv_align_rela, > + [R_RISCV_RVC_BRANCH] = apply_r_riscv_rvc_branch_rela, > + [R_RISCV_RVC_JUMP] = apply_r_riscv_rvc_jump_rela, > + /* 46-50 reserved for future standard use */ > + [R_RISCV_RELAX] = apply_r_riscv_relax_rela, > + [R_RISCV_SUB6] = apply_r_riscv_sub6_rela, > + [R_RISCV_SET6] = apply_r_riscv_set6_rela, > + [R_RISCV_SET8] = apply_r_riscv_set8_rela, > + [R_RISCV_SET16] = apply_r_riscv_set16_rela, > + [R_RISCV_SET32] = apply_r_riscv_set32_rela, > + [R_RISCV_32_PCREL] = apply_r_riscv_32_pcrel_rela, > + [R_RISCV_IRELATIVE] = dynamic_linking_not_supported, > + [R_RISCV_PLT32] = apply_r_riscv_plt32_rela, > + [R_RISCV_SET_ULEB128] = apply_r_riscv_set_uleb128, > + [R_RISCV_SUB_ULEB128] = apply_r_riscv_sub_uleb128, > + /* 62-191 reserved for future standard use */ > + /* 192-255 nonstandard ABI extensions */ > }; Hi Charlie, This is not a critique of this patch, but all these callbacks take a u32 *location and because of the compressed instructions this pointer may not be aligned, so a lot of the callbacks end up doing unaligned access which may fault to an M-mode handler on some platforms. I once sent a patch to fix this: https://lore.kernel.org/linux-riscv/20220224152456.493365-2-kernel@esmil.dk/ Maybe that's something you want to look into while touching this code anyway. /Emil > > int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, > @@ -348,6 +479,10 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, > unsigned int i, type; > Elf_Addr v; > int res; > + bool uleb128_set_exists = false; > + u32 *uleb128_set_loc; > + unsigned long uleb128_set_sym_val; > + > > pr_debug("Applying relocate section %u to %u\n", relsec, > sechdrs[relsec].sh_info); > @@ -425,6 +560,28 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, > me->name); > return -EINVAL; > } > + } else if (type == R_RISCV_SET_ULEB128) { > + if (uleb128_set_exists) { > + pr_err("%s: riscv psABI requires the next ULEB128 relocation to come after a R_RISCV_SET_ULEB128 is an R_RISCV_SUB_ULEB128, not another R_RISCV_SET_ULEB128.\n", > + me->name); > + return -EINVAL; > + } > + uleb128_set_exists = true; > + uleb128_set_loc = location; > + uleb128_set_sym_val = > + ((Elf_Sym *)sechdrs[symindex].sh_addr + > + ELF_RISCV_R_SYM(rel[i].r_info)) > + ->st_value + > + rel[i].r_addend; > + } else if (type == R_RISCV_SUB_ULEB128) { > + if (uleb128_set_exists && uleb128_set_loc == location) { > + /* Calculate set and subtraction */ > + v = uleb128_set_sym_val - v; > + } else { > + pr_err("%s: R_RISCV_SUB_ULEB128 must always be paired with the first R_RISCV_SET_ULEB128 that comes before it. PC = %p\n", > + me->name, location); > + return -EINVAL; > + } > } > > res = handler(me, location, v); > > -- > 2.34.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv