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From: Yosry Ahmed <yosryahmed@google.com>
To: x86@kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	 Dave Hansen <dave.hansen@linux.intel.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	 Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
	 Rick Edgecombe <rick.p.edgecombe@intel.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	 linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/3] x86/mm: Use IPIs to synchronize LAM enablement
Date: Thu, 4 Apr 2024 14:27:33 -0700	[thread overview]
Message-ID: <CAJD7tkYg3KbmMHg0jt8x0Lp9zss6qr-9PnbwmYXGfa0uQ_Xyig@mail.gmail.com> (raw)
In-Reply-To: <20240312155641.4003683-1-yosryahmed@google.com>

On Tue, Mar 12, 2024 at 8:56 AM Yosry Ahmed <yosryahmed@google.com> wrote:
>
> LAM can only be enabled when a process is single-threaded.  But _kernel_
> threads can temporarily use a single-threaded process's mm.
>
> If LAM is enabled by a userspace process while a kthread is using its
> mm, the kthread will not observe LAM enablement (i.e.  LAM will be
> disabled in CR3). This could be fine for the kthread itself, as LAM only
> affects userspace addresses. However, if the kthread context switches to
> a thread in the same userspace process, CR3 may or may not be updated
> because the mm_struct doesn't change (based on pending TLB flushes). If
> CR3 is not updated, the userspace thread will run incorrectly with LAM
> disabled, which may cause page faults when using tagged addresses.
> Example scenario:
>
> CPU 1                                   CPU 2
> /* kthread */
> kthread_use_mm()
>                                         /* user thread */
>                                         prctl_enable_tagged_addr()
>                                         /* LAM enabled on CPU 2 */
> /* LAM disabled on CPU 1 */
>                                         context_switch() /* to CPU 1 */
> /* Switching to user thread */
> switch_mm_irqs_off()
> /* CR3 not updated */
> /* LAM is still disabled on CPU 1 */
>
> Synchronize LAM enablement by sending an IPI from
> prctl_enable_tagged_addr() to all CPUs running with the mm_struct to
> enable LAM. This makes sure LAM is enabled on CPU 1 in the above
> scenario before prctl_enable_tagged_addr() returns and userspace starts
> using tagged addresses, and before it's possible to run the userspace
> process on CPU 1.
>
> In switch_mm_irqs_off(), move reading the LAM mask until after
> mm_cpumask() is updated. This ensures that if an outdated LAM mask is
> written to CR3, an IPI is received to update it right after IRQs are
> re-enabled.
>
> Fixes: 82721d8b25d7 ("x86/mm: Handle LAM on context switch")
> Suggested-by: Andy Lutomirski <luto@kernel.org>
> Signed-off-by: Yosry Ahmed <yosryahmed@google.com>
> Reviewed-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>

There hasn't been any further review comments on v2, and the merge
window has been closed for a while now. Do I need  to take any further
action or send a new version of this series?


      parent reply	other threads:[~2024-04-04 21:28 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-12 15:56 Yosry Ahmed
2024-03-12 15:56 ` [PATCH v2 2/3] x86/mm: Fix LAM inconsistency during context switch Yosry Ahmed
2024-03-13 13:38   ` Kirill A. Shutemov
2024-03-12 15:56 ` [PATCH v2 3/3] x86/mm: Cleanup prctl_enable_tagged_addr() nr_bits error checking Yosry Ahmed
2024-03-12 16:04 ` [PATCH v2 1/3] x86/mm: Use IPIs to synchronize LAM enablement Dave Hansen
2024-03-12 16:09   ` Yosry Ahmed
2024-03-12 16:13     ` Borislav Petkov
2024-03-12 16:23       ` Yosry Ahmed
2024-03-12 16:35         ` Borislav Petkov
2024-03-12 16:46           ` Yosry Ahmed
2024-03-12 17:01             ` Borislav Petkov
2024-03-12 17:05               ` Yosry Ahmed
2024-04-04 21:27 ` Yosry Ahmed [this message]

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