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[209.85.218.48]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a912ee077sm522287366b.65.2024.10.23.13.34.33 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Oct 2024 13:34:33 -0700 (PDT) Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-a9a26a5d6bfso16587366b.1 for ; Wed, 23 Oct 2024 13:34:33 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCWAm4S3Iyr9ABMe9ylbRKsTqfuAt8ydmw8JCrE5zPBKRfnXRdAISaGQCGwN+19nNKF6YKNFLR9UvQ==@kvack.org X-Received: by 2002:a17:907:72cb:b0:a99:87ea:de57 with SMTP id a640c23a62f3a-a9abf852bb7mr329557766b.2.1729715672886; Wed, 23 Oct 2024 13:34:32 -0700 (PDT) MIME-Version: 1.0 References: <20240912-seq_optimize-v3-1-8ee25e04dffa@gentwo.org> <20240917071246.GA27290@willie-the-truck> <4b546151-d5e1-22a3-a6d5-167a82c5724d@gentwo.org> <20241023194543.GD11151@noisy.programming.kicks-ass.net> In-Reply-To: <20241023194543.GD11151@noisy.programming.kicks-ass.net> From: Linus Torvalds Date: Wed, 23 Oct 2024 13:34:16 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3] Avoid memory barrier in read_seqcount() through load acquire To: Peter Zijlstra Cc: "Christoph Lameter (Ampere)" , Will Deacon , Thomas Gleixner , Catalin Marinas , Ingo Molnar , Waiman Long , Boqun Feng , linux-mm@kvack.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-Rspam-User: X-Stat-Signature: fjaw1soj75k8rug9iyxsw8wxprjactsn X-Rspamd-Queue-Id: 509631C0012 X-Rspamd-Server: rspam11 X-HE-Tag: 1729715642-695112 X-HE-Meta: U2FsdGVkX19TWoeELQqzhJAidTzEa51WcPa0A3JhV3csRy8Ay/G11zanEbO+Fyy3nnpgsdKUtC6IeYGr2Slmw4XC1vpCFaU/rIUiIKbtU9ySI8axko1clECcB0Xzb5E/t2QUkVLuO2ZoDJcXcZ0zzDQAHLNMlg125avN9viCjCoej2gSAoXCzKKU+qmAleFUyGrCRJ1eXsIIrYyAoE3p8yXEGZgVTxckpZuE73BF5fUq+3c2rU5XC84eMU768eyazDEIYaFe16GVCgqmL6AU1tjjjyLG/f5QeTbc+5XPjszJpr7rPYEfMDbeTxZxw1Ao+yveC/iiwYGBjC1OH1A3WFnsCuqcZtYZDOVDyGFEknm2gk4ebR1MuR+W5e9NSotfuj6NjfsLVRx/38+TTDt2YrxL0Yj1gAeHIF28aE/0ZytB9V1+chycB36VCzAru8xDrqLc+h7A/HzSOs5v9YlWsqJT62oYOPvWO2cZ2bc79HH7xldRmcCn3AX+CS69Mmd7apHhf/lF2LHOXtpxLXK6xh5/IS2GKJoS0K4SBFxUO0suGUZRPsgLnN13p5L0r1DE+ym5hxYozHZ/XGydsfwqHmtolIha8XLHKPIAON8NR7q1CxYCiUjW+3FTCZ5uC2GcNG9fv4dBxpGOA+/LZU2xDIUQZ3KqIJQoYcmgSpbuEXcCU+fAtZHzjqYeVi7MHQAgssFSuQIgnA3lKHTOaE8NOYA4g7wQ7grm0mHwabJFZiQp4H0/ToIyAenuNA4a0ncOjtqsFIYqq6RPJFEpyJlF4JmTZ26cWxMoTFZd5l9KSdXudannFvt3OWAyIHCCbeFiooaPssgvKn8wD6+80Y4pqMlQdy+L0y8cWJ2EHshyPsJvrzsApE+wePrOhemQ0gMrP0CMyaRSqr6qPisZHEFp/YaR5oMYQ5Sw62QXpaqzngDAhv0ntKGJIK/8LnQpFQq3QmRN/w7S8JV1TVGXth8 5OChSauS EKlWiwM78Dun7xVCGV5T7JjDSJKLghIcYrMtLTW1XrlD+d4lwfRFzijvcKGob0DJM2TeKJ5M6gp7alEMKy2oM894+vdRrBRq5uyq2T2Qf9px3XefF+w8hSIM5ByG5FzLB7URKISuZICAf2Ju/6gpA/ofKd1E3/iu7s8O529vm9RgqMWkXj5q1ysiOhuUE5/7dQWqZVt5qqCy+qT2Ul0phajXfaja0j8bFCVbXG5GLEgc1Kf1RLGr+tc8h4IewhQTmZIAqPAZlgLFeUqXpU4CRncH7xnCJ4RRQ7ekyBip/Q9g5GGJUfIoa9Na3vgBXfJb6DQezdXzsFEKB9beqH6uSLm7vT4g3c1GAg2lqNRNvzbeMI1w5AAm8gfLB2n2vk0OyWQojthK5vl/wB2FsBQz3YbwHZ+R9an8f03BWC9dxKg4ex8JRTvB/kZYvxiG2VcKfEjHzQeOWiHH80g6abu/+TXpVORs2254xTJsnwcl3yIJjqryilJv11Hb6iPz3mR+Zn2FUbYb/XDV10XHl+y8mvR8F/r//8uQ3Flbr7haZ+TsSE0q72csV5gL4LCrkQfil/51eTFWe/ZwgmMyln469fuhA//6EedzrM5Dd4xv3XsTI6NoxtEvwY9nOm1r+TnJXhRF4zk3q+/+l1ANeaKlG/Ul/2dk+V2hocg2ISovHISwXEzAA88hQE6/uqQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Wed, 23 Oct 2024 at 12:45, Peter Zijlstra wrote: > > Do we want to do the complementing patch and make write_seqcount_end() > use smp_store_release() ? > > I think at least ARM (the 32bit thing) has wmb but uses mb for > store_release. But I also think I don't really care about that. So unlike the "acquire vs rmb", there are architectures where "wmb" is noticeably cheaper than a "store release". Just as an example, on alpha, a "store release" is a full memory barrier followed by the store, because it needs to serialize previous loads too. But wmp_wmb() is lightweight. Typically in traditional (pre acquire/release) architectures "wmb" only ordered the CPU write queues, so "wmb" has always been cheap pretty much everywhere. And I *suspect* that alpha isn't the outlier in having a much cheaper wmb than store-release. But yeah, it's kind of ugly how we now have three completely different orderings for seqcounts: - the initial load is done with the smp_read_acquire - the final load (the "retry") is done with a smp_rmb (because an acquire orders _subsequent_ loads, not the ones inside the lock: we'd actually want a "smp_load_release()", but such a thing doesn't exist) - the writer side uses smp_wmb (and arguably there's a fourth pattern: the latching cases uses double smp_wmb, because it orders the sequence count wrt both preceding and subsequent stores) Anyway, obviously on x86 (and s390) none of this matters. On arm64, I _suspect_ they are mostly the same, but it's going to be very microarchitecture-dependent. Neither should be expensive, but wmb really is a fundamentally lightweight operation. On 32-bit arm, wmb should be cheaper ("ishst" only waits for earlier stores). On powerpc, wmb is cheaper on older CPU's (eieio vs sync), but the same on newer CPUs (lwsync). On alpha, wmb is definitely cheaper, but I doubt anybody really cares. Others? I stopped looking, and am not familiar enough. Linus