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From: Alexandre Ghiti <alexghiti@rivosinc.com>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: Andrew Jones <ajones@ventanamicro.com>,
	Will Deacon <will@kernel.org>,
	 "Aneesh Kumar K . V" <aneesh.kumar@linux.ibm.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	 Nick Piggin <npiggin@gmail.com>,
	Peter Zijlstra <peterz@infradead.org>,
	 Mayuresh Chitale <mchitale@ventanamicro.com>,
	Vincent Chen <vincent.chen@sifive.com>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 Albert Ou <aou@eecs.berkeley.edu>,
	linux-arch@vger.kernel.org, linux-mm@kvack.org,
	 linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	 Samuel Holland <samuel@sholland.org>,
	Lad Prabhakar <prabhakar.csengg@gmail.com>
Subject: Re: [PATCH v4 1/4] riscv: Improve flush_tlb()
Date: Wed, 18 Oct 2023 13:26:25 +0200	[thread overview]
Message-ID: <CAHVXubiM=JPRZXjsdK1JTGBbywxT_tYRNminZw8ZLo=jAj8N+w@mail.gmail.com> (raw)
In-Reply-To: <2047b2c2-bf37-4c02-9297-d89f95863ed5@sifive.com>

Hi Samuel,

On Mon, Oct 9, 2023 at 7:53 PM Samuel Holland <samuel.holland@sifive.com> wrote:
>
> On 2023-09-11 8:12 AM, Alexandre Ghiti wrote:
> > For now, flush_tlb() simply calls flush_tlb_mm() which results in a
>
> s/flush_tlb/tlb_flush/ here and in the subject.
>
> Otherwise:
> Reviewed-by: Samuel Holland <samuel.holland@sifive.com>

Ahah good catch, thanks for that and the RB!

Alex

>
> > flush of the whole TLB. So let's use mmu_gather fields to provide a more
> > fine-grained flush of the TLB.
> >
> > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> > ---
> >  arch/riscv/include/asm/tlb.h      | 8 +++++++-
> >  arch/riscv/include/asm/tlbflush.h | 3 +++
> >  arch/riscv/mm/tlbflush.c          | 7 +++++++
> >  3 files changed, 17 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/include/asm/tlb.h b/arch/riscv/include/asm/tlb.h
> > index 120bcf2ed8a8..1eb5682b2af6 100644
> > --- a/arch/riscv/include/asm/tlb.h
> > +++ b/arch/riscv/include/asm/tlb.h
> > @@ -15,7 +15,13 @@ static void tlb_flush(struct mmu_gather *tlb);
> >
> >  static inline void tlb_flush(struct mmu_gather *tlb)
> >  {
> > -     flush_tlb_mm(tlb->mm);
> > +#ifdef CONFIG_MMU
> > +     if (tlb->fullmm || tlb->need_flush_all)
> > +             flush_tlb_mm(tlb->mm);
> > +     else
> > +             flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end,
> > +                                tlb_get_unmap_size(tlb));
> > +#endif
> >  }
> >
> >  #endif /* _ASM_RISCV_TLB_H */
> > diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/tlbflush.h
> > index a09196f8de68..f5c4fb0ae642 100644
> > --- a/arch/riscv/include/asm/tlbflush.h
> > +++ b/arch/riscv/include/asm/tlbflush.h
> > @@ -32,6 +32,8 @@ static inline void local_flush_tlb_page(unsigned long addr)
> >  #if defined(CONFIG_SMP) && defined(CONFIG_MMU)
> >  void flush_tlb_all(void);
> >  void flush_tlb_mm(struct mm_struct *mm);
> > +void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start,
> > +                     unsigned long end, unsigned int page_size);
> >  void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr);
> >  void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
> >                    unsigned long end);
> > @@ -52,6 +54,7 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
> >  }
> >
> >  #define flush_tlb_mm(mm) flush_tlb_all()
> > +#define flush_tlb_mm_range(mm, start, end, page_size) flush_tlb_all()
> >  #endif /* !CONFIG_SMP || !CONFIG_MMU */
> >
> >  /* Flush a range of kernel pages */
> > diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c
> > index 77be59aadc73..fa03289853d8 100644
> > --- a/arch/riscv/mm/tlbflush.c
> > +++ b/arch/riscv/mm/tlbflush.c
> > @@ -132,6 +132,13 @@ void flush_tlb_mm(struct mm_struct *mm)
> >       __flush_tlb_range(mm, 0, -1, PAGE_SIZE);
> >  }
> >
> > +void flush_tlb_mm_range(struct mm_struct *mm,
> > +                     unsigned long start, unsigned long end,
> > +                     unsigned int page_size)
> > +{
> > +     __flush_tlb_range(mm, start, end - start, page_size);
> > +}
> > +
> >  void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
> >  {
> >       __flush_tlb_range(vma->vm_mm, addr, PAGE_SIZE, PAGE_SIZE);
>


  reply	other threads:[~2023-10-18 11:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-11 13:12 [PATCH v4 0/4] riscv: tlb flush improvements Alexandre Ghiti
2023-09-11 13:12 ` [PATCH v4 1/4] riscv: Improve flush_tlb() Alexandre Ghiti
2023-09-19 12:07   ` Lad, Prabhakar
2023-10-09 17:53   ` Samuel Holland
2023-10-18 11:26     ` Alexandre Ghiti [this message]
2023-09-11 13:12 ` [PATCH v4 2/4] riscv: Improve flush_tlb_range() for hugetlb pages Alexandre Ghiti
2023-09-19 12:07   ` Lad, Prabhakar
2023-10-09 17:53   ` Samuel Holland
2023-10-18 11:32     ` Alexandre Ghiti
2023-09-11 13:12 ` [PATCH v4 3/4] riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlb Alexandre Ghiti
2023-09-19 12:09   ` Lad, Prabhakar
2023-09-11 13:12 ` [PATCH v4 4/4] riscv: Improve flush_tlb_kernel_range() Alexandre Ghiti
2023-09-13  8:04   ` Alexandre Ghiti
2023-09-13  8:23     ` Lad, Prabhakar
2023-09-13  8:32       ` Alexandre Ghiti
2023-09-19 12:09   ` Lad, Prabhakar

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