From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8348DEB8FB6 for ; Wed, 6 Sep 2023 12:01:55 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id D89C9280018; Wed, 6 Sep 2023 08:01:54 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id D1273280017; Wed, 6 Sep 2023 08:01:54 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id BB47B280018; Wed, 6 Sep 2023 08:01:54 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id AD2A6280017 for ; Wed, 6 Sep 2023 08:01:54 -0400 (EDT) Received: from smtpin15.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id 4A4B2140D9E for ; Wed, 6 Sep 2023 12:01:54 +0000 (UTC) X-FDA: 81206033748.15.29A159A Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) by imf18.hostedemail.com (Postfix) with ESMTP id 82B0B1C0042 for ; Wed, 6 Sep 2023 12:01:50 +0000 (UTC) Authentication-Results: imf18.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=xLxBCScu; spf=pass (imf18.hostedemail.com: domain of alexghiti@rivosinc.com designates 209.85.221.41 as permitted sender) smtp.mailfrom=alexghiti@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1694001710; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=Sp8EZRgwEyyTmPheARIzvhEwRO9ZLG7z8fbcdxO2Tiw=; b=XX+7tBzF3/Z1nYWdES5BZ3f+VAv6TcFddDQNq7V1mUyZWqinQ2IXX5t3AcwMA/zH/HqB63 CR9r76couyJHC4WgnJLQsBd5Up/FXq8rw+rSSWKPRj8o5fUbotC9v0/i/uOjEErwEkhQL9 YnsihMwod5AYGT2Xs5eALQYD/uxtM54= ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1694001710; a=rsa-sha256; cv=none; b=hNfMrvDMq/0vTj1uItHOw4C5IwsSFWAcuBYog0pG8NlItjFt/LqTCxGYLd105gzfpnjUnD dty9moaOlpoElCQxHrLDIKVLw+wh7fL/8TTdZrARm2t0jHqhQZ1gyQVxSYZ2Dxvzpg0VFB VcZy4GowTyky360seofS0jIqgzkMJyM= ARC-Authentication-Results: i=1; imf18.hostedemail.com; dkim=pass header.d=rivosinc-com.20230601.gappssmtp.com header.s=20230601 header.b=xLxBCScu; spf=pass (imf18.hostedemail.com: domain of alexghiti@rivosinc.com designates 209.85.221.41 as permitted sender) smtp.mailfrom=alexghiti@rivosinc.com; dmarc=none Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-31f4950333cso2518805f8f.3 for ; Wed, 06 Sep 2023 05:01:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1694001709; x=1694606509; darn=kvack.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=Sp8EZRgwEyyTmPheARIzvhEwRO9ZLG7z8fbcdxO2Tiw=; b=xLxBCScu/FR1cFblN9zjYkuJcXVQLE90eIod+ClT//t72FUYOtqz1QyelZWuy6cbuE EYanMOWBBnXUwhW8hOBX6zYH/DitrejT/YsWZ3qqnb1emQobX6Twqgr/I0hPkkklWAI3 3rwL4vJZ8WnC5EV9yghgIxod5wNXdGmCOG16JxW7B5QiIujDPUPSv5GR3YQqtNiqPC4U RW+YakCXL906mNN5hym+EQvK/euAr2xDsiRhzb/LVFY/UOAGsA7xWe+XBWHW1tKCPCOw TkS6yD3H6NxymG3mrusLgoB0xxByGVHiiR/igdrjI6y0G83j0TnxWWLjIXOfuLvuL4UF VZuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1694001709; x=1694606509; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Sp8EZRgwEyyTmPheARIzvhEwRO9ZLG7z8fbcdxO2Tiw=; b=f9noe9SQuiPPbJWj34LNUoualNAHPjJtoRrDI6mWfhqf88cJ3x2eSG4cwQXXoTXgmU IcdUu+qYzDWoZiweSDv6+qpwPxJqlyOyo4gQC1hq+K2xcqwky2Sjwkr0Vbyjjcyc55EE egJc84AM5ahVHwowal9+3fPpuPhmNZcLjZOXwdn1DzpBy1D9/RvLQZthDWNYiV+LDr/j tLf0x+8n3XOJxVIXXjRk+epy11POBwATuzSbgtZo6l9TCVXnMhR4o4DBawCU8ZGCd1Ve qUqB6hQgmEDHrpq+aJ/ZnOwyUkOIrCMHfX5cN2A69sCEYdWy9is0Pl8spW87Mtftqqkr pxvw== X-Gm-Message-State: AOJu0Yzhm4pTh7piHcIa+559cLjM8bAC1FpvhTkzMvQFU/CcT3Eap+zz CUWrCW4xi8eEt8GLdYklCuauxfsQUJFHySTe2OnKhg== X-Google-Smtp-Source: AGHT+IEhIllMnM0PjECRqiitAitNZCsEvGEterT8Gl6AxXRapewVRPWj9ivnFDU+enq8y+LvA5OL44z2Ha1PBTDFPVs= X-Received: by 2002:a5d:6e88:0:b0:319:6b5e:85e3 with SMTP id k8-20020a5d6e88000000b003196b5e85e3mr1878514wrz.71.1694001708759; Wed, 06 Sep 2023 05:01:48 -0700 (PDT) MIME-Version: 1.0 References: <20230801085402.1168351-1-alexghiti@rivosinc.com> <20230801085402.1168351-5-alexghiti@rivosinc.com> In-Reply-To: From: Alexandre Ghiti Date: Wed, 6 Sep 2023 14:01:38 +0200 Message-ID: Subject: Re: [PATCH v3 4/4] riscv: Improve flush_tlb_kernel_range() To: "Lad, Prabhakar" Cc: Geert Uytterhoeven , Will Deacon , "Aneesh Kumar K . V" , Andrew Morton , Nick Piggin , Peter Zijlstra , Mayuresh Chitale , Vincent Chen , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-arch@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Jones Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Rspamd-Queue-Id: 82B0B1C0042 X-Rspam-User: X-Stat-Signature: y6ztwwi1ifs3iy8bhatsdxnci5exkqjd X-Rspamd-Server: rspam03 X-HE-Tag: 1694001710-310795 X-HE-Meta: U2FsdGVkX19Zf28duXjz7mXJLc+ckFqRxr+hBDPtuK2In6HOrI0N8SNHEVP4niS2NOS/RTASVYb3pI0Mbxw1z8tIKexu+HT+VeKPGK/ce+DmGdkfux8Di8XGn7dv4EEwTYgN5CzvyqxXZC8HdF8BHetCQ4s+BWirdQ9T6884ZzanYQu3XzmerP0DXLJW0MZsGblEkLa4PoSiJTITsv455GfNw/VyvEeJZq/C9bUPIukeLyXy/HnjDlJCdfE6v3FlLGz0IWyf5gVxX6u48ZkqAEQ8OGYxjw7TuUUEHnEf1qIxGCWLSlVsrG3nrfz9TeTD6Y0BwI2YeD02CdvqajvvAVwIch1EUqT9bLdrCnUOhTBjjMamdlVHDy/NFah+DP3iFjdXeTc3tYoxrf1bwEXeNz9PhPXZqkZ5Qre6un7YY/8MJw6d0QtTF9Qz/8zkgUnT/Cc/sH4detSr9T3tqPfSzFsRozYCiyEfDHX6hbKIEjN6c0qXhtFFo90iote1V3uV34Aq1NtQxd8I8KJ4gCN49Kho6rlgHQGjS+oLttuPb0yZU6ocmifyNRrykfbsTSoPOJkE2dvt7+ScDY6lMok9KzWoufaw0Nf7wYAnYxD1OuNTvlWCKrecGKW1a95zSn67Aq2fJEQ+z2kJxmhTIAeTqljvIVKY3S4ui645awi4v/aZ29EQxwGbK8IQU552Op+PYPRth8RqjQgWZwTMn0ApgGdwrQ3hc+pXUWCC3Oy9VPIPENoNEyRSr8OQ3aJchie4lulvSzFbCx17higSWeWK/KsT8SDGXaR9dHreD6+AVgZWSAmBsS6OcFnt6bxupMImCemiLgmzhKDJevJzDx8IcX4T14q3yymTibpty0MmlcMVilE3P6WJEtc9831tFVZGmjczHBqPQaXF+xi3jYxdYWqlcFSGvTGR8zqa1hkXXFFkL2w3cd0Nsu3hgyJME5STukl+3tv7ieO7QA2/SSf tryhWu1m 3573V5ZOALfQfzM21lwK9NsYxHo0lrJeFeGMU3mVvMfI9ofXxAU8g8ihAcgXSZm6ULgXNeXUq9lvhdsK2RFexwCO/D3R2z1G4QXcmOpmcgAoiYZ15p4j1epe3IRw1RbNXgjxXvQQvlaTDVofgLU4sSq+9xYioDjpNo/idIjrGzdqUdLzRQ66IH0H30AA7sINZhmpVoJH6dvza8cI+uhqsYGT5afmduOlf3whZN0kZEegy5qw6AvXIEQE3BMUZdiosBHgRGBk28aO2Hqe6vcgK53ExqwjS6f8Ro1JtcxntZXPNBJzicm5SuaMNpzXhFet7vILnzgfQHEy+d3R4ZN0szDeUu0iDCl/fSFMwFIQTFxsZpYzC1cc3YTs5IGbOATljKQhDS3AfW5YvTQFisNaDqgHJ6+W9NK3hkQ2PgwxzoRqYD1zIiht4oHh5/2HomEK2eBg9vMnTYQH/vX9DP2MnRZZd9aMsTFYZca/wnRYuDbs7ulX1FxJvQt+/7jKs4XsZGIPgRT4z0vjNsT/Zrc+FHCUDmSrC6yUQIn4vo5/aF7R+HcZyDNIp4ViB/N26YVWI0tMjC/CUj9TpOkC1C3HCKfzTwy3OBl0o4Vdm X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi Prabhakar, On Wed, Sep 6, 2023 at 1:49=E2=80=AFPM Lad, Prabhakar wrote: > > Hi Alexandre, > > On Tue, Aug 1, 2023 at 9:58=E2=80=AFAM Alexandre Ghiti wrote: > > > > This function used to simply flush the whole tlb of all harts, be more > > subtile and try to only flush the range. > > > > The problem is that we can only use PAGE_SIZE as stride since we don't = know > > the size of the underlying mapping and then this function will be impro= ved > > only if the size of the region to flush is < threshold * PAGE_SIZE. > > > > Signed-off-by: Alexandre Ghiti > > Reviewed-by: Andrew Jones > > --- > > arch/riscv/include/asm/tlbflush.h | 11 +++++----- > > arch/riscv/mm/tlbflush.c | 34 +++++++++++++++++++++++-------- > > 2 files changed, 31 insertions(+), 14 deletions(-) > > > After applying this patch, I am seeing module load issues on RZ/Five > (complete log [0]). I am testing defconfig + [1] (rz/five related > configs). > > Any pointers on what could be an issue here? Can you give me the exact version of the kernel you use? The trap addresses are vmalloc addresses, and a fix for those landed very late in the release cycle. > > [0] https://paste.debian.net/1291116/ > [1] https://paste.debian.net/1291118/ > > Cheers, > Prabhakar > > > diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm= /tlbflush.h > > index f5c4fb0ae642..7426fdcd8ec5 100644 > > --- a/arch/riscv/include/asm/tlbflush.h > > +++ b/arch/riscv/include/asm/tlbflush.h > > @@ -37,6 +37,7 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigne= d long start, > > void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr); > > void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, > > unsigned long end); > > +void flush_tlb_kernel_range(unsigned long start, unsigned long end); > > #ifdef CONFIG_TRANSPARENT_HUGEPAGE > > #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE > > void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long sta= rt, > > @@ -53,15 +54,15 @@ static inline void flush_tlb_range(struct vm_area_s= truct *vma, > > local_flush_tlb_all(); > > } > > > > -#define flush_tlb_mm(mm) flush_tlb_all() > > -#define flush_tlb_mm_range(mm, start, end, page_size) flush_tlb_all() > > -#endif /* !CONFIG_SMP || !CONFIG_MMU */ > > - > > /* Flush a range of kernel pages */ > > static inline void flush_tlb_kernel_range(unsigned long start, > > unsigned long end) > > { > > - flush_tlb_all(); > > + local_flush_tlb_all(); > > } > > > > +#define flush_tlb_mm(mm) flush_tlb_all() > > +#define flush_tlb_mm_range(mm, start, end, page_size) flush_tlb_all() > > +#endif /* !CONFIG_SMP || !CONFIG_MMU */ > > + > > #endif /* _ASM_RISCV_TLBFLUSH_H */ > > diff --git a/arch/riscv/mm/tlbflush.c b/arch/riscv/mm/tlbflush.c > > index 0c955c474f3a..687808013758 100644 > > --- a/arch/riscv/mm/tlbflush.c > > +++ b/arch/riscv/mm/tlbflush.c > > @@ -120,18 +120,27 @@ static void __flush_tlb_range(struct mm_struct *m= m, unsigned long start, > > unsigned long size, unsigned long stride) > > { > > struct flush_tlb_range_data ftd; > > - struct cpumask *cmask =3D mm_cpumask(mm); > > - unsigned int cpuid; > > + struct cpumask *cmask, full_cmask; > > bool broadcast; > > > > - if (cpumask_empty(cmask)) > > - return; > > + if (mm) { > > + unsigned int cpuid; > > + > > + cmask =3D mm_cpumask(mm); > > + if (cpumask_empty(cmask)) > > + return; > > + > > + cpuid =3D get_cpu(); > > + /* check if the tlbflush needs to be sent to other CPUs= */ > > + broadcast =3D cpumask_any_but(cmask, cpuid) < nr_cpu_id= s; > > + } else { > > + cpumask_setall(&full_cmask); > > + cmask =3D &full_cmask; > > + broadcast =3D true; > > + } > > > > - cpuid =3D get_cpu(); > > - /* check if the tlbflush needs to be sent to other CPUs */ > > - broadcast =3D cpumask_any_but(cmask, cpuid) < nr_cpu_ids; > > if (static_branch_unlikely(&use_asid_allocator)) { > > - unsigned long asid =3D atomic_long_read(&mm->context.id= ) & asid_mask; > > + unsigned long asid =3D mm ? atomic_long_read(&mm->conte= xt.id) & asid_mask : 0; > > > > if (broadcast) { > > if (riscv_use_ipi_for_rfence()) { > > @@ -165,7 +174,8 @@ static void __flush_tlb_range(struct mm_struct *mm,= unsigned long start, > > } > > } > > > > - put_cpu(); > > + if (mm) > > + put_cpu(); > > } > > > > void flush_tlb_mm(struct mm_struct *mm) > > @@ -196,6 +206,12 @@ void flush_tlb_range(struct vm_area_struct *vma, u= nsigned long start, > > > > __flush_tlb_range(vma->vm_mm, start, end - start, stride_size); > > } > > + > > +void flush_tlb_kernel_range(unsigned long start, unsigned long end) > > +{ > > + __flush_tlb_range(NULL, start, end, PAGE_SIZE); > > +} > > + > > #ifdef CONFIG_TRANSPARENT_HUGEPAGE > > void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long sta= rt, > > unsigned long end) > > -- > > 2.39.2 > > > >