Re: [PATCH] x86/mm: Disable hugetlb page table sharing on non-PAE 32-bit

[Jann Horn <jannh@google.com>]

On Mon, Jun 30, 2025 at 10:39 PM Dave Hansen <dave.hansen@intel.com> wrote:
> On 6/30/25 12:07, Jann Horn wrote:
> > --- a/arch/x86/Kconfig
> > +++ b/arch/x86/Kconfig
> > @@ -147,7 +147,7 @@ config X86
> >       select ARCH_WANTS_DYNAMIC_TASK_STRUCT
> >       select ARCH_WANTS_NO_INSTR
> >       select ARCH_WANT_GENERAL_HUGETLB
> > -     select ARCH_WANT_HUGE_PMD_SHARE
> > +     select ARCH_WANT_HUGE_PMD_SHARE         if PGTABLE_LEVELS > 2
> >       select ARCH_WANT_LD_ORPHAN_WARN
> >       select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP   if X86_64
> >       select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP       if X86_64
>
> Does pmd sharing really even work on 32-bit? Just practically, you only
> ever have 3GB of address space and thus 3 possible PGDs that can be used
> for sharing (with the 3:1 split configured). You presumably need *some*
> address space for the binary to even execve(). The vdso and friends go
> somewhere and we normally don't let anything get mapped at 0x0.
>
> I think that leaves _maybe_ one slot.
>
> Barring something some specific and compelling actual use case, this
> should probably just be:
>
>         select ARCH_WANT_HUGE_PMD_SHARE if X86_64

Yeah, makes sense. I was also thinking that it would be more
reasonable to restrict this to 64-bit only, but figured it would be
less risky to make this more specific change.

But now that I think about it, it's not like stuff is actually going
to break from this change, worst case the kernel memory usage goes up
a bunch in a very unlikely configuration... so yeah, I guess I'll
resend this later with "if X86-64".