From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1770CC07E99 for ; Mon, 5 Jul 2021 18:34:55 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 876AB613AE for ; Mon, 5 Jul 2021 18:34:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 876AB613AE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 2CBB36B00A7; Mon, 5 Jul 2021 14:34:54 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 2A2556B00A8; Mon, 5 Jul 2021 14:34:54 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 144496B00A9; Mon, 5 Jul 2021 14:34:54 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0035.hostedemail.com [216.40.44.35]) by kanga.kvack.org (Postfix) with ESMTP id E4A256B00A7 for ; Mon, 5 Jul 2021 14:34:53 -0400 (EDT) Received: from smtpin23.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id 62B0E18410DC9 for ; Mon, 5 Jul 2021 18:34:53 +0000 (UTC) X-FDA: 78329385666.23.DA1D0AF Received: from mail-vs1-f51.google.com (mail-vs1-f51.google.com [209.85.217.51]) by imf03.hostedemail.com (Postfix) with ESMTP id 1832E30000A5 for ; Mon, 5 Jul 2021 18:34:52 +0000 (UTC) Received: by mail-vs1-f51.google.com with SMTP id u11so5840521vsl.7 for ; Mon, 05 Jul 2021 11:34:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=PyiqVUE+ntLzMRVPUHZ6FHS6+5UlV3m0HiIsOxrVjY4=; b=nZUYPmP6qtbXca7GX8EeElovo6wOO+DkYRNtMoZxbNCYe2bkOAyrtEhsJj7ZA3/gLz GtWJ/TiZ6xarNBuKM/R7Lki54wE24k1l71cyC0AA4PPoiE3hHmM+O1biaVlAacirO1EK ZqVmoOWqPwCCuJPVY82l69a3Yi/daaC5Pcz4KOjNXnoM+sPyTAC635l7tkg1KXMvOHvf 7JbAnb9zkX6zbp0sgMAfhiafjmVyIL3YR4F5/6wuVabSjiOWGchxADrK8An4yEgyw5Fg U1yiyGeXEk2B+GRztd00WBdizOvMRgrSmwFmPzfhpeftJoP0iQt5EisBG+0St06U7NlU mS4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=PyiqVUE+ntLzMRVPUHZ6FHS6+5UlV3m0HiIsOxrVjY4=; b=Nevsyvtu45SgnInCchNOTiadoS4JKW6Ao9aanFLbvVOws8vdZDl1N1+/oEtyozgjSq UFUu5hRf+9MfC6DW5CQwN6cNtXn/ZHarQdC1J6ia2UPEWzUP9BC091T01tyakVpJ4YqJ KOPWfKS47HL3yAeKBotaK1AOeUs+YTQYqACuxwYfl+Td+yoWwFHRokpLjUqESL5OhNYd VMVINBpABsgfkd7YlxQwE6M2NeINfv4aWBhnnrWBKHOMwPomKI7df1pzc89PmJeAOrJM Gtcj1JYthY50nPHzd1tOKFiivrybAk0edYMUvDdrPepOgGhOMMKOxs0bp9RGx3Hudsvx IZMA== X-Gm-Message-State: AOAM531OelGgIpmD0HNJq7cOotzJ4UAfh5MxV1NgHbQ3NJFolvd8Sq02 fGfPANVCtAi5vMpQsNiV8HGOY+x36OjjggyvFZY= X-Google-Smtp-Source: ABdhPJx6Q+2Pxx6dTtLMi/gRKYTg/I1N9m0Gi5tRZMW88QkGAfSdrCgTssmecwifKYo41fbY84O5ePs6g+Ff09zGPlU= X-Received: by 2002:a05:6102:134f:: with SMTP id j15mr10930224vsl.30.1625510092405; Mon, 05 Jul 2021 11:34:52 -0700 (PDT) MIME-Version: 1.0 References: <202106282039.5z2USbJH-lkp@intel.com> In-Reply-To: <202106282039.5z2USbJH-lkp@intel.com> From: Souptick Joarder Date: Tue, 6 Jul 2021 00:04:40 +0530 Message-ID: Subject: Re: [linux-next:master 5384/13831] drivers/scsi/mpi3mr/mpi3mr_os.c:873 mpi3mr_update_tgtdev() error: we previously assumed 'mrioc->shost' could be null (see line 870) To: Dan Carpenter Cc: kbuild@lists.01.org, Kashyap Desai , kbuild test robot , kbuild-all@lists.01.org, Linux Memory Management List , "Martin K. Petersen" , Hannes Reinecke , Tomas Henzl , Himanshu Madhani Content-Type: text/plain; charset="UTF-8" Authentication-Results: imf03.hostedemail.com; dkim=pass header.d=gmail.com header.s=20161025 header.b=nZUYPmP6; spf=pass (imf03.hostedemail.com: domain of jrdrlinux@gmail.com designates 209.85.217.51 as permitted sender) smtp.mailfrom=jrdrlinux@gmail.com; dmarc=pass (policy=none) header.from=gmail.com X-Rspamd-Server: rspam03 X-Rspamd-Queue-Id: 1832E30000A5 X-Stat-Signature: jayopyddcrrf7coqc83a8krdsm3uxb8i X-HE-Tag: 1625510092-827065 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Mon, Jun 28, 2021 at 5:59 PM Dan Carpenter wrote: > > tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master > head: 3579aa488520feeda433ceca23ef4704bf8cd280 > commit: 74e1f30a28680978fa9ddfb5360d0cc644cd348e [5384/13831] scsi: mpi3mr: Add EEDP DIF DIX support > config: i386-randconfig-m021-20210628 (attached as .config) > compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot > Reported-by: Dan Carpenter > > smatch warnings: > drivers/scsi/mpi3mr/mpi3mr_os.c:873 mpi3mr_update_tgtdev() error: we previously assumed 'mrioc->shost' could be null (see line 870) > > vim +873 drivers/scsi/mpi3mr/mpi3mr_os.c > > 13ef29ea4aa065 Kashyap Desai 2021-05-20 800 static void mpi3mr_update_tgtdev(struct mpi3mr_ioc *mrioc, > 13ef29ea4aa065 Kashyap Desai 2021-05-20 801 struct mpi3mr_tgt_dev *tgtdev, struct mpi3_device_page0 *dev_pg0) > 13ef29ea4aa065 Kashyap Desai 2021-05-20 802 { > 13ef29ea4aa065 Kashyap Desai 2021-05-20 803 u16 flags = 0; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 804 struct mpi3mr_stgt_priv_data *scsi_tgt_priv_data; > 74e1f30a286809 Kashyap Desai 2021-05-20 805 u8 prot_mask = 0; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 806 > 13ef29ea4aa065 Kashyap Desai 2021-05-20 807 tgtdev->perst_id = le16_to_cpu(dev_pg0->persistent_id); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 808 tgtdev->dev_handle = le16_to_cpu(dev_pg0->dev_handle); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 809 tgtdev->dev_type = dev_pg0->device_form; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 810 tgtdev->encl_handle = le16_to_cpu(dev_pg0->enclosure_handle); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 811 tgtdev->parent_handle = le16_to_cpu(dev_pg0->parent_dev_handle); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 812 tgtdev->slot = le16_to_cpu(dev_pg0->slot); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 813 tgtdev->q_depth = le16_to_cpu(dev_pg0->queue_depth); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 814 tgtdev->wwid = le64_to_cpu(dev_pg0->wwid); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 815 > 13ef29ea4aa065 Kashyap Desai 2021-05-20 816 flags = le16_to_cpu(dev_pg0->flags); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 817 tgtdev->is_hidden = (flags & MPI3_DEVICE0_FLAGS_HIDDEN); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 818 > 13ef29ea4aa065 Kashyap Desai 2021-05-20 819 if (tgtdev->starget && tgtdev->starget->hostdata) { > 13ef29ea4aa065 Kashyap Desai 2021-05-20 820 scsi_tgt_priv_data = (struct mpi3mr_stgt_priv_data *) > 13ef29ea4aa065 Kashyap Desai 2021-05-20 821 tgtdev->starget->hostdata; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 822 scsi_tgt_priv_data->perst_id = tgtdev->perst_id; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 823 scsi_tgt_priv_data->dev_handle = tgtdev->dev_handle; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 824 scsi_tgt_priv_data->dev_type = tgtdev->dev_type; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 825 } > 13ef29ea4aa065 Kashyap Desai 2021-05-20 826 > 13ef29ea4aa065 Kashyap Desai 2021-05-20 827 switch (tgtdev->dev_type) { > 13ef29ea4aa065 Kashyap Desai 2021-05-20 828 case MPI3_DEVICE_DEVFORM_SAS_SATA: > 13ef29ea4aa065 Kashyap Desai 2021-05-20 829 { > 13ef29ea4aa065 Kashyap Desai 2021-05-20 830 struct mpi3_device0_sas_sata_format *sasinf = > 13ef29ea4aa065 Kashyap Desai 2021-05-20 831 &dev_pg0->device_specific.sas_sata_format; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 832 u16 dev_info = le16_to_cpu(sasinf->device_info); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 833 > 13ef29ea4aa065 Kashyap Desai 2021-05-20 834 tgtdev->dev_spec.sas_sata_inf.dev_info = dev_info; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 835 tgtdev->dev_spec.sas_sata_inf.sas_address = > 13ef29ea4aa065 Kashyap Desai 2021-05-20 836 le64_to_cpu(sasinf->sas_address); > 13ef29ea4aa065 Kashyap Desai 2021-05-20 837 if ((dev_info & MPI3_SAS_DEVICE_INFO_DEVICE_TYPE_MASK) != > 13ef29ea4aa065 Kashyap Desai 2021-05-20 838 MPI3_SAS_DEVICE_INFO_DEVICE_TYPE_END_DEVICE) > 13ef29ea4aa065 Kashyap Desai 2021-05-20 839 tgtdev->is_hidden = 1; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 840 else if (!(dev_info & (MPI3_SAS_DEVICE_INFO_STP_SATA_TARGET | > 13ef29ea4aa065 Kashyap Desai 2021-05-20 841 MPI3_SAS_DEVICE_INFO_SSP_TARGET))) > 13ef29ea4aa065 Kashyap Desai 2021-05-20 842 tgtdev->is_hidden = 1; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 843 break; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 844 } > 8e653455547a47 Kashyap Desai 2021-05-20 845 case MPI3_DEVICE_DEVFORM_PCIE: > 8e653455547a47 Kashyap Desai 2021-05-20 846 { > 8e653455547a47 Kashyap Desai 2021-05-20 847 struct mpi3_device0_pcie_format *pcieinf = > 8e653455547a47 Kashyap Desai 2021-05-20 848 &dev_pg0->device_specific.pcie_format; > 8e653455547a47 Kashyap Desai 2021-05-20 849 u16 dev_info = le16_to_cpu(pcieinf->device_info); > 8e653455547a47 Kashyap Desai 2021-05-20 850 > 8e653455547a47 Kashyap Desai 2021-05-20 851 tgtdev->dev_spec.pcie_inf.capb = > 8e653455547a47 Kashyap Desai 2021-05-20 852 le32_to_cpu(pcieinf->capabilities); > 8e653455547a47 Kashyap Desai 2021-05-20 853 tgtdev->dev_spec.pcie_inf.mdts = MPI3MR_DEFAULT_MDTS; > 8e653455547a47 Kashyap Desai 2021-05-20 854 /* 2^12 = 4096 */ > 8e653455547a47 Kashyap Desai 2021-05-20 855 tgtdev->dev_spec.pcie_inf.pgsz = 12; > 8e653455547a47 Kashyap Desai 2021-05-20 856 if (dev_pg0->access_status == MPI3_DEVICE0_ASTATUS_NO_ERRORS) { > 8e653455547a47 Kashyap Desai 2021-05-20 857 tgtdev->dev_spec.pcie_inf.mdts = > 8e653455547a47 Kashyap Desai 2021-05-20 858 le32_to_cpu(pcieinf->maximum_data_transfer_size); > 8e653455547a47 Kashyap Desai 2021-05-20 859 tgtdev->dev_spec.pcie_inf.pgsz = pcieinf->page_size; > 8e653455547a47 Kashyap Desai 2021-05-20 860 tgtdev->dev_spec.pcie_inf.reset_to = > 8e653455547a47 Kashyap Desai 2021-05-20 861 pcieinf->controller_reset_to; > 8e653455547a47 Kashyap Desai 2021-05-20 862 tgtdev->dev_spec.pcie_inf.abort_to = > 8e653455547a47 Kashyap Desai 2021-05-20 863 pcieinf->nv_me_abort_to; > 8e653455547a47 Kashyap Desai 2021-05-20 864 } > 8e653455547a47 Kashyap Desai 2021-05-20 865 if (tgtdev->dev_spec.pcie_inf.mdts > (1024 * 1024)) > 8e653455547a47 Kashyap Desai 2021-05-20 866 tgtdev->dev_spec.pcie_inf.mdts = (1024 * 1024); > 8e653455547a47 Kashyap Desai 2021-05-20 867 if ((dev_info & MPI3_DEVICE0_PCIE_DEVICE_INFO_TYPE_MASK) != > 8e653455547a47 Kashyap Desai 2021-05-20 868 MPI3_DEVICE0_PCIE_DEVICE_INFO_TYPE_NVME_DEVICE) > 8e653455547a47 Kashyap Desai 2021-05-20 869 tgtdev->is_hidden = 1; > 74e1f30a286809 Kashyap Desai 2021-05-20 @870 if (mrioc->shost) > ^^^^^^^^^^^^ > Check for NULL > > 74e1f30a286809 Kashyap Desai 2021-05-20 871 prot_mask = scsi_host_get_prot(mrioc->shost); > 74e1f30a286809 Kashyap Desai 2021-05-20 872 if (prot_mask & SHOST_DIX_TYPE0_PROTECTION) { > 74e1f30a286809 Kashyap Desai 2021-05-20 @873 scsi_host_set_prot(mrioc->shost, prot_mask & 0x77); > ^^^^^^^^^^^^ > Do we need to check here as well? I think, further check for NULL is not needed. Above check is sufficient. > > 74e1f30a286809 Kashyap Desai 2021-05-20 874 ioc_info(mrioc, > 74e1f30a286809 Kashyap Desai 2021-05-20 875 "%s : Disabling DIX0 prot capability\n", __func__); > 74e1f30a286809 Kashyap Desai 2021-05-20 876 ioc_info(mrioc, > 74e1f30a286809 Kashyap Desai 2021-05-20 877 "because HBA does not support DIX0 operation on NVME drives\n"); > 74e1f30a286809 Kashyap Desai 2021-05-20 878 } > 8e653455547a47 Kashyap Desai 2021-05-20 879 break; > 8e653455547a47 Kashyap Desai 2021-05-20 880 } > 13ef29ea4aa065 Kashyap Desai 2021-05-20 881 case MPI3_DEVICE_DEVFORM_VD: > 13ef29ea4aa065 Kashyap Desai 2021-05-20 882 { > 13ef29ea4aa065 Kashyap Desai 2021-05-20 883 struct mpi3_device0_vd_format *vdinf = > 13ef29ea4aa065 Kashyap Desai 2021-05-20 884 &dev_pg0->device_specific.vd_format; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 885 > 13ef29ea4aa065 Kashyap Desai 2021-05-20 886 tgtdev->dev_spec.vol_inf.state = vdinf->vd_state; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 887 if (vdinf->vd_state == MPI3_DEVICE0_VD_STATE_OFFLINE) > 13ef29ea4aa065 Kashyap Desai 2021-05-20 888 tgtdev->is_hidden = 1; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 889 break; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 890 } > 13ef29ea4aa065 Kashyap Desai 2021-05-20 891 default: > 13ef29ea4aa065 Kashyap Desai 2021-05-20 892 break; > 13ef29ea4aa065 Kashyap Desai 2021-05-20 893 } > 13ef29ea4aa065 Kashyap Desai 2021-05-20 894 } > > --- > 0-DAY CI Kernel Test Service, Intel Corporation > https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org > >