From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ua0-f197.google.com (mail-ua0-f197.google.com [209.85.217.197]) by kanga.kvack.org (Postfix) with ESMTP id 34881831ED for ; Wed, 8 Mar 2017 10:46:20 -0500 (EST) Received: by mail-ua0-f197.google.com with SMTP id f54so52882336uaa.5 for ; Wed, 08 Mar 2017 07:46:20 -0800 (PST) Received: from mail-ua0-x22f.google.com (mail-ua0-x22f.google.com. [2607:f8b0:400c:c08::22f]) by mx.google.com with ESMTPS id p25si1607166uac.210.2017.03.08.07.46.19 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 08 Mar 2017 07:46:19 -0800 (PST) Received: by mail-ua0-x22f.google.com with SMTP id u30so44157058uau.0 for ; Wed, 08 Mar 2017 07:46:19 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <20170308154357.GB13133@leverpostej> References: <20170306124254.77615-1-dvyukov@google.com> <20170306125851.GL6500@twins.programming.kicks-ass.net> <20170306130107.GK6536@twins.programming.kicks-ass.net> <20170306162018.GC18519@leverpostej> <20170306203500.GR6500@twins.programming.kicks-ass.net> <20170308152027.GA13133@leverpostej> <20170308154357.GB13133@leverpostej> From: Dmitry Vyukov Date: Wed, 8 Mar 2017 16:45:58 +0100 Message-ID: Subject: Re: [PATCH] x86, kasan: add KASAN checks to atomic operations Content-Type: text/plain; charset=UTF-8 Sender: owner-linux-mm@kvack.org List-ID: To: Mark Rutland Cc: Will Deacon , Peter Zijlstra , Andrew Morton , Andrey Ryabinin , Ingo Molnar , kasan-dev , "linux-mm@kvack.org" , LKML , "x86@kernel.org" On Wed, Mar 8, 2017 at 4:43 PM, Mark Rutland wrote: > On Wed, Mar 08, 2017 at 04:27:11PM +0100, Dmitry Vyukov wrote: >> On Wed, Mar 8, 2017 at 4:20 PM, Mark Rutland wrote: >> > As in my other reply, I'd prefer that we wrapped the (arch-specific) >> > atomic implementations such that we can instrument them explicitly in a >> > core header. That means that the implementation and semantics of the >> > atomics don't change at all. >> > >> > Note that we could initially do this just for x86 and arm64), e.g. by >> > having those explicitly include an >> > at the end of their . >> >> How exactly do you want to do this incrementally? >> I don't feel ready to shuffle all archs, but doing x86 in one patch >> and then arm64 in another looks tractable. > > I guess we'd have three patches: one adding the header and any core > infrastructure, followed by separate patches migrating arm64 and x86 > over. But if we add e.g. atomic_read() which forwards to arch_atomic_read() to , it will break all archs that don't rename its atomic_read() to arch_atomic_read(). -- To unsubscribe, send a message with 'unsubscribe linux-mm' in the body to majordomo@kvack.org. For more info on Linux MM, see: http://www.linux-mm.org/ . Don't email: email@kvack.org