From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 412BDC4363D for ; Fri, 25 Sep 2020 01:16:53 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id B375220809 for ; Fri, 25 Sep 2020 01:16:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="tYrMTFS8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B375220809 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id BF4E06B006C; Thu, 24 Sep 2020 21:16:51 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id B7F2F6B006E; Thu, 24 Sep 2020 21:16:51 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id A474D6B0070; Thu, 24 Sep 2020 21:16:51 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0230.hostedemail.com [216.40.44.230]) by kanga.kvack.org (Postfix) with ESMTP id 8B8E66B006C for ; Thu, 24 Sep 2020 21:16:51 -0400 (EDT) Received: from smtpin02.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay02.hostedemail.com (Postfix) with ESMTP id 48EAD12C9 for ; Fri, 25 Sep 2020 01:16:51 +0000 (UTC) X-FDA: 77299819422.02.wire42_550155827163 Received: from filter.hostedemail.com (10.5.16.251.rfc1918.com [10.5.16.251]) by smtpin02.hostedemail.com (Postfix) with ESMTP id 1D3AC10196771 for ; Fri, 25 Sep 2020 01:16:51 +0000 (UTC) X-HE-Tag: wire42_550155827163 X-Filterd-Recvd-Size: 8658 Received: from mail-il1-f194.google.com (mail-il1-f194.google.com [209.85.166.194]) by imf31.hostedemail.com (Postfix) with ESMTP for ; Fri, 25 Sep 2020 01:16:50 +0000 (UTC) Received: by mail-il1-f194.google.com with SMTP id t13so800950ile.9 for ; Thu, 24 Sep 2020 18:16:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Ns6EfoJFmlckygboGDS5ISEczvmUEd8piIBG60/RPnA=; b=tYrMTFS8xQB2lckV846BmkoCO0Cv972MONPP7RLSo64J77ZlOuk0+OkFNT2IwvIXDI CHh6OhEFVncCkxDX5eEoniqtKtLz2VfBhYpyiBjNuFS9EhJLghRXxtcn//5XzJ0bHStW bJr98zDdXaG5IFEDTS0YnJe5YMcsapOUPT1/xfiRh3qZEni0jIDAJSZJsbUjCkAl6Ln+ KJS6usmsE4V8MgGnBTIxgJaM7oBBPXAnh5P7KpmT2VR1n1Z/RpAh/EW4HVdOUh0+QnZ+ S3hWg9ON6jVsfXW910hfC1sOB9Pqvcsw/WqjvOq6heaKBdqFniAEAsEaRL9CUeTnIH4x JHXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Ns6EfoJFmlckygboGDS5ISEczvmUEd8piIBG60/RPnA=; b=DZSG1tamqL1UqewoHy6ymnA/b5GSvWdOyDssSXDEMdEsNVGiga8Qnm0dyWZvkcH9p9 NhlkXCDChn869IJFsW9iZy7qTqvFwltuCEGOIQGLJL3NZLgQqGhZcWdz8OxMsn7992Eo dhdaT91WuP3DmtT8i223aDYSBI9kBSkXZcWKi7AIw7JX+LvP64kcWXhrA3ZbH6deXwj0 PNYk/a7uF4tgpAgRuqEtfELe1HVGtfpeDxz1d5WA2UdCU3wFm6wOmhgLXd+/AeKR/M0H krkxRpdSpT3pRQsCjimRsRIUZHNFFsrtIea0/DaE+HHKkxL0EXYi2OAYWX3FLZ+EickN 3aJg== X-Gm-Message-State: AOAM53294Cc7HiqDAL7/1+8wWWBkuJwO+lT6KbdaZgDjGZHYr2jvzztt rlrPqRysOUW8cCM1GBpwkVluNB4t/+HWteDYyvw= X-Google-Smtp-Source: ABdhPJwgiTJ9dsE2n0/+9L38xoHFTLlQGRdoirOef2P6ht4uRab4cVV+a0GIMJC5iO9rOkCkF+Hvj63vn0v+hxGKDS8= X-Received: by 2002:a92:a194:: with SMTP id b20mr1192868ill.287.1600996610043; Thu, 24 Sep 2020 18:16:50 -0700 (PDT) MIME-Version: 1.0 References: <1596190371-17405-1-git-send-email-chenhc@lemote.com> In-Reply-To: <1596190371-17405-1-git-send-email-chenhc@lemote.com> From: Huacai Chen Date: Fri, 25 Sep 2020 09:16:16 +0800 Message-ID: Subject: Re: [PATCH 1/3] mips/mm: Add NUMA balancing support To: Thomas Bogendoerfer , Thomas Gleixner , Jason Cooper , Marc Zyngier , Andrew Morton Cc: "open list:MIPS" , Fuxin Zhang , Jiaxun Yang , linux-mm@kvack.org Content-Type: text/plain; charset="UTF-8" X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: CC linux-mm. On Fri, Jul 31, 2020 at 6:10 PM Huacai Chen wrote: > > NUMA balancing is available on nearly all architectures, but MIPS lacks > it for a long time. In theory, the current NUMA balancing framework only > need a "PROTNONE" page table bit and some APIs to manipulate it. So, it > is time for us to add MIPS's NUMA balancing support (Only for 64bit now > because NUMA balancing depends on huge page implicitly). > > Signed-off-by: Huacai Chen > --- > arch/mips/Kconfig | 1 + > arch/mips/include/asm/pgtable-64.h | 2 +- > arch/mips/include/asm/pgtable-bits.h | 17 +++++++++++++++++ > arch/mips/include/asm/pgtable.h | 18 +++++++++++++++--- > 4 files changed, 34 insertions(+), 4 deletions(-) > > diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig > index 499a20d..62d2b95 100644 > --- a/arch/mips/Kconfig > +++ b/arch/mips/Kconfig > @@ -9,6 +9,7 @@ config MIPS > select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) > select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST > select ARCH_HAS_UBSAN_SANITIZE_ALL > + select ARCH_SUPPORTS_NUMA_BALANCING if 64BIT > select ARCH_SUPPORTS_UPROBES > select ARCH_USE_BUILTIN_BSWAP > select ARCH_USE_CMPXCHG_LOCKREF if 64BIT > diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h > index 1e7d6ce..2aef74b 100644 > --- a/arch/mips/include/asm/pgtable-64.h > +++ b/arch/mips/include/asm/pgtable-64.h > @@ -266,7 +266,7 @@ static inline int pmd_present(pmd_t pmd) > { > #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT > if (unlikely(pmd_val(pmd) & _PAGE_HUGE)) > - return pmd_val(pmd) & _PAGE_PRESENT; > + return pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE); > #endif > > return pmd_val(pmd) != (unsigned long) invalid_pte_table; > diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h > index e26dc41..f697c32 100644 > --- a/arch/mips/include/asm/pgtable-bits.h > +++ b/arch/mips/include/asm/pgtable-bits.h > @@ -52,6 +52,9 @@ enum pgtable_bits { > _PAGE_WRITE_SHIFT, > _PAGE_ACCESSED_SHIFT, > _PAGE_MODIFIED_SHIFT, > +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING) > + _PAGE_PROTNONE_SHIFT, > +#endif > #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL) > _PAGE_SPECIAL_SHIFT, > #endif > @@ -84,6 +87,9 @@ enum pgtable_bits { > _PAGE_WRITE_SHIFT, > _PAGE_ACCESSED_SHIFT, > _PAGE_MODIFIED_SHIFT, > +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING) > + _PAGE_PROTNONE_SHIFT, > +#endif > #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL) > _PAGE_SPECIAL_SHIFT, > #endif > @@ -102,6 +108,9 @@ enum pgtable_bits { > _PAGE_WRITE_SHIFT, > _PAGE_ACCESSED_SHIFT, > _PAGE_MODIFIED_SHIFT, > +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING) > + _PAGE_PROTNONE_SHIFT, > +#endif > #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL) > _PAGE_SPECIAL_SHIFT, > #endif > @@ -131,6 +140,9 @@ enum pgtable_bits { > #if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT) > _PAGE_HUGE_SHIFT, > #endif > +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING) > + _PAGE_PROTNONE_SHIFT, > +#endif > #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL) > _PAGE_SPECIAL_SHIFT, > #endif > @@ -158,6 +170,11 @@ enum pgtable_bits { > #if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT) > # define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT) > #endif > +#if defined(CONFIG_ARCH_SUPPORTS_NUMA_BALANCING) > +# define _PAGE_PROTNONE (1 <<_PAGE_PROTNONE_SHIFT) > +#else > +# define _PAGE_PROTNONE 0 > +#endif > #if defined(CONFIG_ARCH_HAS_PTE_SPECIAL) > # define _PAGE_SPECIAL (1 << _PAGE_SPECIAL_SHIFT) > #else > diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h > index dd7a0f5..3434073 100644 > --- a/arch/mips/include/asm/pgtable.h > +++ b/arch/mips/include/asm/pgtable.h > @@ -25,7 +25,7 @@ > struct mm_struct; > struct vm_area_struct; > > -#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_NO_READ | \ > +#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_NO_READ | \ > _page_cachable_default) > #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | \ > _page_cachable_default) > @@ -188,7 +188,7 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt > #else > > #define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) > -#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) > +#define pte_present(pte) (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROTNONE)) > #define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC) > > /* > @@ -707,7 +707,7 @@ static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) > > static inline pmd_t pmd_mkinvalid(pmd_t pmd) > { > - pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY); > + pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_PROTNONE | _PAGE_DIRTY); > > return pmd; > } > @@ -729,6 +729,18 @@ static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, > > #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ > > +#ifdef CONFIG_NUMA_BALANCING > +static inline long pte_protnone(pte_t pte) > +{ > + return (pte_val(pte) & _PAGE_PROTNONE); > +} > + > +static inline long pmd_protnone(pmd_t pmd) > +{ > + return (pmd_val(pmd) & _PAGE_PROTNONE); > +} > +#endif /* CONFIG_NUMA_BALANCING */ > + > #ifdef _PAGE_HUGE > #define pmd_leaf(pmd) ((pmd_val(pmd) & _PAGE_HUGE) != 0) > #define pud_leaf(pud) ((pud_val(pud) & _PAGE_HUGE) != 0) > -- > 2.7.0 >