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Mon, 20 Jun 2022 23:35:55 -0700 (PDT) X-Gm-Message-State: AJIora9AW+ZCi0NcBh53EbQOkLNiE2Wp52NE8O3AoLZPWfCQ3IXhLDdF nlF3F0uGU1mUUpEjLby9PdksWmtFonssdmzPh4g= X-Google-Smtp-Source: AGRyM1u8F7ekZm6P3bDtbQ3fBC4j9z9rBNp8ZDBt+lKEqlDTGIM4Z9uLIBnSKBHWFZROilPTeGS0oi70rueSET/SqB4= X-Received: by 2002:a05:651c:506:b0:257:c12:b941 with SMTP id o6-20020a05651c050600b002570c12b941mr13701498ljp.429.1655793353606; Mon, 20 Jun 2022 23:35:53 -0700 (PDT) MIME-Version: 1.0 References: <20220617145859.582176-1-chenhuacai@loongson.cn> In-Reply-To: From: Huacai Chen Date: Tue, 21 Jun 2022 14:35:41 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] LoongArch: Add sparse memory vmemmap support To: Arnd Bergmann Cc: Huacai Chen , loongarch@lists.linux.dev, linux-arch , Xuefeng Li , Guo Ren , Xuerui Wang , Jiaxun Yang , Andrew Morton , Linux-MM , Min Zhou Content-Type: text/plain; charset="UTF-8" ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1655793357; 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dkim=pass header.d=kernel.org header.s=k20201202 header.b=YNZ1BvzH; spf=pass (imf05.hostedemail.com: domain of chenhuacai@kernel.org designates 139.178.84.217 as permitted sender) smtp.mailfrom=chenhuacai@kernel.org; dmarc=pass (policy=none) header.from=kernel.org X-HE-Tag: 1655793357-719201 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi, Arnd, On Mon, Jun 20, 2022 at 7:27 PM Arnd Bergmann wrote: > > On Mon, Jun 20, 2022 at 12:24 PM Huacai Chen wrote: > > On Fri, Jun 17, 2022 at 11:42 PM Arnd Bergmann wrote: > > > > > > On Fri, Jun 17, 2022 at 4:58 PM Huacai Chen wrote: > > > > > > > > Add sparse memory vmemmap support for LoongArch. SPARSEMEM_VMEMMAP > > > > uses a virtually mapped memmap to optimise pfn_to_page and page_to_pfn > > > > operations. This is the most efficient option when sufficient kernel > > > > resources are available. > > > > > > I have not looked at this in detail, but from a high-level perspective, it > > > seems very similar to the corresponding code in arch/arm64 and arch/x86. > > > > > > Can you try to merge the three copies into a generic helper and add that > > > to mm/sparse-vmemmap.c? If this does not work, can you describe in the > > > changelog text why these have to be architecture specific? > > > > It is difficult to merge, because LoongArch needs to call pud_init(), > > pmd_init() and other similar things which are unnecessary on ARM64 and > > X86. > > I can see that this part of the code is the same as mips. What is the > initialization > for? Can it be encapsulated in an architecture specific inline > function (for mips > and loongarch), with a generic version like this? > > #ifndef pud_init_invalid > static inline void pud_init_invalid(void *) {} > #endif OK, let's have a try. Huacai > > Arnd