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Thu, 20 Jul 2023 19:21:49 -0700 (PDT) MIME-Version: 1.0 References: <20230719082732.2189747-1-lienze@kylinos.cn> <20230719082732.2189747-2-lienze@kylinos.cn> <87pm4mf1xl.fsf@kylinos.cn> In-Reply-To: <87pm4mf1xl.fsf@kylinos.cn> From: Huacai Chen Date: Fri, 21 Jul 2023 10:21:38 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/4] LoongArch: mm: Add page table mapped mode support To: Enze Li Cc: kernel@xen0n.name, loongarch@lists.linux.dev, glider@google.com, elver@google.com, akpm@linux-foundation.org, kasan-dev@googlegroups.com, linux-mm@kvack.org, zhangqing@loongson.cn, yangtiezhu@loongson.cn, dvyukov@google.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Rspamd-Server: rspam09 X-Rspamd-Queue-Id: 26E3440009 X-Stat-Signature: hrj7hpbq1i778rw4q94akaa8tizreasc X-Rspam-User: X-HE-Tag: 1689906112-961424 X-HE-Meta: U2FsdGVkX19J1ZKi+mPLMdV3p3HKuSdQK+7Gihqte/N8+BoUMzfevBqbxOLPHzxA84ItBu+3fWy72xMW1yX336HBWYwemeUP83z3EpkCxOgqQgXjO9jBZUe/HKEsjF+PIChZ5BzoSrKhhbV368vtthjNfsyROW2QVVnPvuaRNRk+/2A6ba45kAqULLMOHNwz7VM7liMU71tkOV3VXyVVXN7h6LVTZI/UUF8jHz4dE2EFsi3g/ln+6P0ZUo17DQl00MlJ/mIn/9RIu8FdWfyUNWZTGGJQh9EaY4sun6dmJAW63g2WqwPJadxBRLMwLNReiwTXfFYVzyvX3kEp2qOxd+SCGT4fPRiX1mvhFxMPdE670iiqbBgroDImgwdWlEkFfjRrTLuNyrLXIqQvejdFP/6m1z3sUNv8zpDW916NpzyxUwut0H8GOlxoNka7tyc7iQW6KNxGVysY28o5KZ1gqchfrda+jv50HfhCbVICxjZM/Ltob5e+KnmDWZmSpIECd9dAqTMpXA9cKxjj69paF3rIH/M4PR7pHNAOFAQuQp/ytVUqWFrIZxDY3kuHNfB1Dui6dULyQcXFu97RyJ3mo5QbOyP4h7aadEWvl8WHizRdwGv6pIdLtC8gvm4aI3LMi/Wnh8QKrGOH8SPeZnIXg6K9IItv+x1ghWKAmhLrQq8U8hvrsaSvEqm2IXhgYuunH5WnZzOSrLOBNjg5ZaB2k+QsrRLrD2C41cKeDgWcsbv3vx17AwuRtsm/jxe8AyuVyJAsL4yMZXRs7jTlhgid5Fi1pC837KrKNRtFwlCHBYwKIiQnNL+Axv4ECpjgbR14Ey83b6VUlt7Yqeu2pxRjVBpOsK+ZPp0XhHiFu47x6UaBowNDTjbJ6iNMl/2j/tOUb2CTGWlWIfSDb2maTiLm34R9iAGKyo4lZeRvpxghgPG1VDRnSJbmKj4xP7CFGIZXiBSeD6gRt3zGRgn4BSN 42bytRmt FGefajv1Nr7sYzzvwgjo3zVhjM7NN2KhzGPFJjJbjBBPHJ1g3j80xunxz7QYPhqiQlljp8miYGYMJxyi4JozP9KiFiXrMmzVJrGG2rV8DpWoYKOXtA1HMeYRTv6cXyj4eZ97Ity+ul3cS+CUBxYXu2yiLgaK2le8/nWPDksELy1y4BaCQm0AWNmT77VAmn71WJ3IFpLRgg229Mm92jaeJQFylQDe2HbPMkOFgZW0UUzvleLsm0yxUmuQG76dno/d3hsWzpOCxtKId4P++YpRAjy0Gaqz3xy5SGUGdj1Xa/hbR942HCxgjlOPh9L8CqPtvwGTP0lWWg8gPG1wNq/Vbkhl3T0gqhU51a3AkYgmwdTxXIZWqlAfSqQK1Tyh1TsBaDDj/40c2O/NyLdSB5fuDBqw6Og== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Fri, Jul 21, 2023 at 10:12=E2=80=AFAM Enze Li wrote: > > On Wed, Jul 19 2023 at 11:29:37 PM +0800, Huacai Chen wrote: > > > Hi, Enze, > > > > On Wed, Jul 19, 2023 at 4:34=E2=80=AFPM Enze Li wro= te: > >> > >> According to LoongArch documentation online, there are two types of ad= dress > >> translation modes: direct mapped address translation mode (direct mapp= ed mode) > >> and page table mapped address translation mode (page table mapped mode= ). > >> > >> Currently, the upstream code only supports DMM (Direct Mapped Mode). > >> This patch adds a function that determines whether PTMM (Page Table > >> Mapped Mode) should be used, and also adds the corresponding handler > >> funcitons for both modes. > >> > >> For more details on the two modes, see [1]. > >> > >> [1] > >> https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.h= tml#virtual-address-space-and-address-translation-mode > >> > >> Signed-off-by: Enze Li > >> --- > >> arch/loongarch/include/asm/page.h | 10 ++++++++++ > >> arch/loongarch/include/asm/pgtable.h | 6 ++++++ > >> arch/loongarch/mm/pgtable.c | 25 +++++++++++++++++++++++++ > >> 3 files changed, 41 insertions(+) > >> > >> diff --git a/arch/loongarch/include/asm/page.h b/arch/loongarch/includ= e/asm/page.h > >> index 26e8dccb6619..05919be15801 100644 > >> --- a/arch/loongarch/include/asm/page.h > >> +++ b/arch/loongarch/include/asm/page.h > >> @@ -84,7 +84,17 @@ typedef struct { unsigned long pgprot; } pgprot_t; > >> #define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x)) > >> > >> #define virt_to_pfn(kaddr) PFN_DOWN(PHYSADDR(kaddr)) > >> + > >> +#ifdef CONFIG_64BIT > >> +#define virt_to_page(kaddr) = \ > >> +({ = \ > >> + is_PTMM_addr((unsigned long)kaddr) ? = \ > >> + PTMM_virt_to_page((unsigned long)kaddr) : = \ > >> + DMM_virt_to_page((unsigned long)kaddr); = \ > >> +}) > > 1, Rename these helpers to > > is_dmw_addr()/dmw_virt_to_page()/tlb_virt_to_page() will be better. > > 2, These helpers are so simple so can be defined as inline function or > > macros in page.h. > > Hi Huacai, > > Except for tlb_virt_to_page(), the remaining two modifications are easy. > > I've run into a lot of problems when trying to make tlb_virt_to_page() > as a macro or inline function. That's because we need to export this > symbol in order for it to be used by the module that called the > virt_to_page() function, other wise, we got the following errors, > > ----------------------------------------------------------------------- > MODPOST Module.symvers > ERROR: modpost: "tlb_virt_to_page" [fs/hfsplus/hfsplus.ko] undefined! > ERROR: modpost: "tlb_virt_to_page" [fs/smb/client/cifs.ko] undefined! > ERROR: modpost: "tlb_virt_to_page" [crypto/gcm.ko] undefined! > ERROR: modpost: "tlb_virt_to_page" [crypto/ccm.ko] undefined! > ERROR: modpost: "tlb_virt_to_page" [crypto/essiv.ko] undefined! > ERROR: modpost: "tlb_virt_to_page" [lib/crypto/libchacha20poly1305.ko] un= defined! > ERROR: modpost: "tlb_virt_to_page" [drivers/gpu/drm/ttm/ttm.ko] undefined= ! > ERROR: modpost: "tlb_virt_to_page" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko]= undefined! > ERROR: modpost: "tlb_virt_to_page" [drivers/scsi/iscsi_tcp.ko] undefined! > ERROR: modpost: "tlb_virt_to_page" [drivers/scsi/qla2xxx/qla2xxx.ko] unde= fined! > WARNING: modpost: suppressed 44 unresolved symbol warnings because there = were too many) > ----------------------------------------------------------------------- > > It seems to me that wrapping it into a common function might be the only > way to successfully compile or link with this modification. > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D > --- a/arch/loongarch/include/asm/pgtable.h > +++ b/arch/loongarch/include/asm/pgtable.h > @@ -360,6 +360,8 @@ static inline void pte_clear(struct mm_struct *mm, un= signed long addr, pte_t *pt > #define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1) > #define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1) > > +inline struct page *tlb_virt_to_page(unsigned long kaddr); > + > > --- a/arch/loongarch/mm/pgtable.c > +++ b/arch/loongarch/mm/pgtable.c > @@ -9,6 +9,12 @@ > #include > #include > > +inline struct page *tlb_virt_to_page(unsigned long kaddr) > +{ > + return pte_page(*virt_to_kpte(kaddr)); > +} > +EXPORT_SYMBOL_GPL(tlb_virt_to_page); > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D > > WDYT? > > Best Regards, > Enze If you define "static inline" functions in page.h, there will be no problem= s. Huacai > > > 3, CONFIG_64BIT can be removed here. > > > > Huacai > > > >> +#else > >> #define virt_to_page(kaddr) pfn_to_page(virt_to_pfn(kaddr)) > >> +#endif > >> > >> extern int __virt_addr_valid(volatile void *kaddr); > >> #define virt_addr_valid(kaddr) __virt_addr_valid((volatile void *)(ka= ddr)) > >> diff --git a/arch/loongarch/include/asm/pgtable.h b/arch/loongarch/inc= lude/asm/pgtable.h > >> index ed6a37bb55b5..0fc074b8bd48 100644 > >> --- a/arch/loongarch/include/asm/pgtable.h > >> +++ b/arch/loongarch/include/asm/pgtable.h > >> @@ -360,6 +360,12 @@ static inline void pte_clear(struct mm_struct *mm= , unsigned long addr, pte_t *pt > >> #define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1) > >> #define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1) > >> > >> +#ifdef CONFIG_64BIT > >> +struct page *DMM_virt_to_page(unsigned long kaddr); > >> +struct page *PTMM_virt_to_page(unsigned long kaddr); > >> +bool is_PTMM_addr(unsigned long kaddr); > >> +#endif > >> + > >> extern pgd_t swapper_pg_dir[]; > >> extern pgd_t invalid_pg_dir[]; > >> > >> diff --git a/arch/loongarch/mm/pgtable.c b/arch/loongarch/mm/pgtable.c > >> index 36a6dc0148ae..4c6448f996b6 100644 > >> --- a/arch/loongarch/mm/pgtable.c > >> +++ b/arch/loongarch/mm/pgtable.c > >> @@ -9,6 +9,31 @@ > >> #include > >> #include > >> > >> +#ifdef CONFIG_64BIT > >> +/* DMM stands for Direct Mapped Mode. */ > >> +struct page *DMM_virt_to_page(unsigned long kaddr) > >> +{ > >> + return pfn_to_page(virt_to_pfn(kaddr)); > >> +} > >> +EXPORT_SYMBOL_GPL(DMM_virt_to_page); > >> + > >> +/* PTMM stands for Page Table Mapped Mode. */ > >> +struct page *PTMM_virt_to_page(unsigned long kaddr) > >> +{ > >> + return pte_page(*virt_to_kpte(kaddr)); > >> +} > >> +EXPORT_SYMBOL_GPL(PTMM_virt_to_page); > >> + > >> +bool is_PTMM_addr(unsigned long kaddr) > >> +{ > >> + if (unlikely((kaddr & GENMASK(BITS_PER_LONG - 1, cpu_vabits)) = =3D=3D > >> + GENMASK(BITS_PER_LONG - 1, cpu_vabits))) > >> + return true; > >> + return false; > >> +} > >> +EXPORT_SYMBOL_GPL(is_PTMM_addr); > >> +#endif > >> + > >> pgd_t *pgd_alloc(struct mm_struct *mm) > >> { > >> pgd_t *ret, *init; > >> -- > >> 2.34.1 > >> > >> >