From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2355BC433F5 for ; Wed, 11 May 2022 05:30:17 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 965926B0073; Wed, 11 May 2022 01:30:16 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 915976B0075; Wed, 11 May 2022 01:30:16 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 7B6966B0078; Wed, 11 May 2022 01:30:16 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0011.hostedemail.com [216.40.44.11]) by kanga.kvack.org (Postfix) with ESMTP id 6DC8E6B0073 for ; Wed, 11 May 2022 01:30:16 -0400 (EDT) Received: from smtpin02.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay12.hostedemail.com (Postfix) with ESMTP id 45E89121775 for ; Wed, 11 May 2022 05:30:16 +0000 (UTC) X-FDA: 79452336432.02.D52F850 Received: from mail-vs1-f49.google.com (mail-vs1-f49.google.com [209.85.217.49]) by imf15.hostedemail.com (Postfix) with ESMTP id BC8B2A009F for ; Wed, 11 May 2022 05:30:03 +0000 (UTC) Received: by mail-vs1-f49.google.com with SMTP id e10so903849vsr.1 for ; Tue, 10 May 2022 22:30:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=vB2dR56A5q3bFoAJ53SBSeAtmH77H5/ybtaBTyeQV0w=; b=ikgkCUlCGPbFI/KIA/yJ6gB9/0MYb3JI9K0o5JCBRKlQgGkWsZpC7uLQl+rANxK3/k wMsEGVKDlEtSnZ6REsRJfwKIl8itOVEpgP7LSl4X+Zy3TNN/upnfQ1mY4aV44W1J0Vln MNPHCRa3i8mMagY9xHbVKc9TxTbbY6cggRTJ2xaXLgUf/KIF76ve3joDWJ1RtXoCKIJl PheSx8lbtuBBY3/b5YJ/CgPTE2b/Eb6H1NWgnK9R9cEpip9NRytEd4tlpadx9wmsB3cM NNulML+cFkkpwhIz38h+4zSMVmf2y7Ca0CObNcuoQTmrQ+lDHAQQlltdstcx837Px5wY sqCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=vB2dR56A5q3bFoAJ53SBSeAtmH77H5/ybtaBTyeQV0w=; b=DwVAsIWjxQcIAYDWcDAZir0OhptUku1R+EWR5vxZTX3Ciq+FiQMwiioxJ+lfk5bxQC OCjQgCE+1X+TGRC4wJpPDPEx4HCOJZEVpDAgap23WVg+VPE3bYjolv4eJBbbdCQpKUbB wT0pb6zssDLRzTZXrbILSf0c1xSywv3o1N25aoZ1s+oC7d1xbBkMKsqzKndpCKbxmJ4v lbLyvT7jV99nlolu0Y1KBGm+q+56+BLUIkgJ/Ua+PlpBwPDHUSPKmKYKk2Q30Cpmoaev BBT+ZPZfCqeU4jbewLeSyV/Fb0BqLfXQjnIpNdyvZdOXKr18XC0d+dPXjPEbXA7VhDo2 xqGw== X-Gm-Message-State: AOAM533Jfo3M8cwgUStXoPkW+H7SLugfWGzRjon9IKjBqlt2WqpeFUq/ aNuDK4b8rifiGVsf5/jfcE+WvknE8D30cApc6Xp9Zw== X-Google-Smtp-Source: ABdhPJzzixIezT5gEqBLEgY1fCr7L5PsmPNpQOqsuUutiXHgiLkjXSrPgB0gKdqJMWjIOVxUbUhYgLgbIQEu2o/mAk0= X-Received: by 2002:a67:ed88:0:b0:328:27d9:1381 with SMTP id d8-20020a67ed88000000b0032827d91381mr13054653vsp.12.1652247014975; Tue, 10 May 2022 22:30:14 -0700 (PDT) MIME-Version: 1.0 References: <87tua3h5r1.fsf@nvdebian.thelocal> <875ymerl81.fsf@nvdebian.thelocal> <87fslhhb2l.fsf@linux.ibm.com> In-Reply-To: <87fslhhb2l.fsf@linux.ibm.com> From: Wei Xu Date: Tue, 10 May 2022 22:30:03 -0700 Message-ID: Subject: Re: RFC: Memory Tiering Kernel Interfaces To: "Aneesh Kumar K.V" Cc: Alistair Popple , Yang Shi , Andrew Morton , Dave Hansen , Huang Ying , Dan Williams , Linux MM , Greg Thelen , Jagdish Gediya , Linux Kernel Mailing List , Davidlohr Bueso , Michal Hocko , Baolin Wang , Brice Goglin , Feng Tang , Jonathan Cameron , Tim Chen Content-Type: text/plain; charset="UTF-8" X-Rspamd-Server: rspam03 X-Rspamd-Queue-Id: BC8B2A009F X-Stat-Signature: c31m565e8xhqg97ba77cxdnn46hsp1fn Authentication-Results: imf15.hostedemail.com; dkim=pass header.d=google.com header.s=20210112 header.b=ikgkCUlC; dmarc=pass (policy=reject) header.from=google.com; spf=pass (imf15.hostedemail.com: domain of weixugc@google.com designates 209.85.217.49 as permitted sender) smtp.mailfrom=weixugc@google.com X-Rspam-User: X-HE-Tag: 1652247003-919030 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Tue, May 10, 2022 at 4:38 AM Aneesh Kumar K.V wrote: > > Alistair Popple writes: > > > Wei Xu writes: > > > >> On Thu, May 5, 2022 at 5:19 PM Alistair Popple wrote: > >>> > >>> Wei Xu writes: > >>> > >>> [...] > >>> > >>> >> > > >>> >> > > >>> >> > Tiering Hierarchy Initialization > >>> >> > `==============================' > >>> >> > > >>> >> > By default, all memory nodes are in the top tier (N_TOPTIER_MEMORY). > >>> >> > > >>> >> > A device driver can remove its memory nodes from the top tier, e.g. > >>> >> > a dax driver can remove PMEM nodes from the top tier. > >>> >> > >>> >> With the topology built by firmware we should not need this. > >>> > >>> I agree that in an ideal world the hierarchy should be built by firmware based > >>> on something like the HMAT. But I also think being able to override this will be > >>> useful in getting there. Therefore a way of overriding the generated hierarchy > >>> would be good, either via sysfs or kernel boot parameter if we don't want to > >>> commit to a particular user interface now. > >>> > >>> However I'm less sure letting device-drivers override this is a good idea. How > >>> for example would a GPU driver make sure it's node is in the top tier? By moving > >>> every node that the driver does not know about out of N_TOPTIER_MEMORY? That > >>> could get messy if say there were two drivers both of which wanted their node to > >>> be in the top tier. > >> > >> The suggestion is to allow a device driver to opt out its memory > >> devices from the top-tier, not the other way around. > > > > So how would demotion work in the case of accelerators then? In that > > case we would want GPU memory to demote to DRAM, but that won't happen > > if both DRAM and GPU memory are in N_TOPTIER_MEMORY and it seems the > > only override available with this proposal would move GPU memory into a > > lower tier, which is the opposite of what's needed there. > > How about we do 3 tiers now. dax kmem devices can be registered to > tier 3. By default all numa nodes can be registered at tier 2 and HBM or > GPU can be enabled to register at tier 1. ? This makes sense. I will send an updated RFC based on the discussions so far. > -aneesh