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[209.85.220.65]) by mx.google.com with SMTPS id m19sor5165224ejd.6.2019.04.25.10.57.37 for (Google Transport Security); Thu, 25 Apr 2019 10:57:37 -0700 (PDT) Received-SPF: pass (google.com: domain of pasha.tatashin@soleen.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@soleen.com header.s=google header.b=S8gasJAV; spf=pass (google.com: domain of pasha.tatashin@soleen.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=pasha.tatashin@soleen.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=soleen.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=/lfFoLZ1bSmGmdUbBHFXNJ+M6oegr5l9R4TFlcxu7Mw=; b=S8gasJAVn+ZWmiT/2uWvL9vkKwOoktSsgWDJ2pt28Jwb8U3hd4RYZILlgs1ZJSbb32 E8pkwIX2WZ5U7s0jN5OFpHJANArcLfSTG2WfhU0d/yE03quAyfTD+ozv8EsylrGARl0T Q47fyZiS5Uwz5G+0wsjfnj+2u2oPWY05lYUanIDY7LgNL4FubQm9/F7oW4oEqNThrg84 gLONpjU+mkfLCeD5a8uQeIbLsAUPMjwvrtbFH/bnTAbaqEuYWZAP012PG9WJeaoH5kLo K72nQU2oKXRez7H4b59QLM2pnJhyW8VIp8FGqSBLbgfBlnZF9Iex1qPjic/qyWHcnHbT 3/XQ== X-Google-Smtp-Source: APXvYqw1cnJsUKvmbES+9b09tCQYh+M//QuIDsABsPOCGjahHfAnSjITfrASIQUqNSCPM/SZxSQ7kryctJSAM+dJY2g= X-Received: by 2002:a17:906:944b:: with SMTP id z11mr3858668ejx.151.1556215056839; Thu, 25 Apr 2019 10:57:36 -0700 (PDT) MIME-Version: 1.0 References: <20190423203843.2898-1-pasha.tatashin@soleen.com> <20190425152550.GY12751@dhcp22.suse.cz> <20190425153138.GC25193@fuggles.cambridge.arm.com> <20190425154156.GZ12751@dhcp22.suse.cz> In-Reply-To: <20190425154156.GZ12751@dhcp22.suse.cz> From: Pavel Tatashin Date: Thu, 25 Apr 2019 13:57:25 -0400 Message-ID: Subject: Re: [PATCH] arm64: configurable sparsemem section size To: Michal Hocko Cc: Will Deacon , James Morris , Sasha Levin , LKML , linux-mm , linux-nvdimm , Andrew Morton , Dave Hansen , Dan Williams , Keith Busch , Vishal L Verma , Dave Jiang , Ross Zwisler , Tom Lendacky , "Huang, Ying" , Fengguang Wu , Borislav Petkov , Bjorn Helgaas , Yaowei Bai , Takashi Iwai , =?UTF-8?B?SsOpcsO0bWUgR2xpc3Nl?= , Catalin Marinas , rppt@linux.vnet.ibm.com, Ard Biesheuvel , andrew.murray@arm.com, james.morse@arm.com, Marc Zyngier , sboyd@kernel.org, Linux ARM Content-Type: text/plain; charset="UTF-8" X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: > > I gave *vague* memories of running out of bits in the page flags if we > > changed this, but that was a while back. If that's no longer the case, > > then I'm open to changing the value, but I really don't want to expose > > it as a Kconfig option as proposed in this patch. People won't have a > > clue what to set and it doesn't help at all with the single-Image effort. > > Ohh, I absolutely agree about the config option part JFTR. 1GB section > loos quite excessive. I am not really sure a standard arm64 memory > layout looks though. I am now looking to use Dan's patches "mm: Sub-section memory hotplug support" to solve this problem. I think this patch can be ignored. Pasha