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Date: Thu, 30 Jun 2016 20:21:15 -0700
Message-ID: <CA+55aFwVMHWH=Xiu7o8RXNgSQ6C6==RZhMNoWJ=kMwA5LAQXdg@mail.gmail.com>
Subject: Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs
From: Linus Torvalds <torvalds@linux-foundation.org>
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To: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>, Michal Hocko <mhocko@suse.com>, Borislav Petkov <bp@alien8.de>, Andrew Morton <akpm@linux-foundation.org>, the arch/x86 maintainers <x86@kernel.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, Andi Kleen <ak@linux.intel.com>, linux-mm <linux-mm@kvack.org>, Dave Hansen <dave@sr71.net>

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On Jun 30, 2016 8:06 PM, "Brian Gerst" <brgerst@gmail.com> wrote:
>
> Could this affect a 32-bit guest VM?

Even on 32-bit, all the distros do PAE to get NX and access to more
physical memory, and that has a 64-bit page table entry.

The 32-bit page table case is pretty unusual.

     Linus

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<p dir=3D"ltr"><br>
On Jun 30, 2016 8:06 PM, &quot;Brian Gerst&quot; &lt;<a href=3D"mailto:brge=
rst@gmail.com">brgerst@gmail.com</a>&gt; wrote:<br>
&gt;<br>
&gt; Could this affect a 32-bit guest VM?</p>
<p dir=3D"ltr">Even on 32-bit, all the distros do PAE to get NX and access =
to more physical memory, and that has a 64-bit page table entry.</p>
<p dir=3D"ltr">The 32-bit page table case is pretty unusual.</p>
<p dir=3D"ltr">=C2=A0=C2=A0=C2=A0=C2=A0 Linus</p>

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