From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Petkov Subject: Re: [RFC, PATCHv1 15/28] x86: detect 5-level paging support Date: Wed, 14 Dec 2016 00:07:54 +0100 Message-ID: References: <20161208162150.148763-1-kirill.shutemov@linux.intel.com> <20161208162150.148763-17-kirill.shutemov@linux.intel.com> <20161208200505.c6xiy56oufg6d24m@pd.tnic> <20161208202013.uutsny6avn5gimwq@pd.tnic> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: "H. Peter Anvin" , Linus Torvalds Cc: "Kirill A. Shutemov" , Andrew Morton , the arch/x86 maintainers , Thomas Gleixner , Ingo Molnar , Arnd Bergmann , Andi Kleen , Dave Hansen , Andy Lutomirski , "linux-arch@vger.kernel.org" , linux-mm , Linux Kernel Mailing List List-Id: linux-mm.kvack.org On December 13, 2016 11:44:06 PM GMT+01:00, "H. Peter Anvin" wrote: >When compiling with -fPIC gcc treats ebx as a "fixed register". A >fixed >register can't be spilled, and so a clobber of a fixed register is a >fatal error. > >Like it or not, it's how it works. > > -hpa In the meantime I talked to my gcc guy and here's the deal: There are gcc versions (4.x and earlier) which do not save/restore the PIC register around an inline asm even if it is one of the registers that the inline asm clobbers. Therefore the saving/restoring needs to be done by the inline asm itself. 5.x and later handle that fine. Thus I was thinking of adding a build-time check for the gcc version but that might turn out to be more code in the end than those ugly ifnc clauses. -- Sent from a small device: formatting sux and brevity is inevitable.