Re: [LSF/MM/BPF TOPIC] Beyond 2MB: Why Terabyte-Scale Machines Need 1GB Transparent Huge Pages

[Zi Yan <ziy@nvidia.com>]

On 19 Feb 2026, at 12:13, Matthew Wilcox wrote:

> On Thu, Feb 19, 2026 at 11:49:27AM -0500, Zi Yan wrote:
>> If HW can support multiple TLB entries translating to the same physical frame
>> and allow translation priority of TLB entries, this remapping would be easy
>> and we can still keep the 1GB PUD mapping. Basically, we can have 1GB TLB entry
>> pointing to the 1GB folio and another 4KB TLB entry pointing to the remapped
>> region and overriding the part in the original 1GB vaddr region.
>
> Uh, do you know any hardware that supports that?  Every CPU I'm familiar
> with has notes suggesting that trying to do this will cause you to Have
> A Very Bad Day.

No. I was imagining it. :)

But thinking about it more, that means for every >PTE TLB hit, HW needs to know
whether any sub-range has an additional translation. It is easy if all sub-range
translations are present in the TLB. Otherwise, a per sub range bitmap or rewalks
of each sub range is needed. Never mind, thank you for waking me up in my
daydream.

Best Regards,
Yan, Zi