From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2BA4C433F5 for ; Mon, 3 Oct 2022 23:09:54 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 4AFD76B0072; Mon, 3 Oct 2022 19:09:54 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 45FCE8E0001; Mon, 3 Oct 2022 19:09:54 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 328436B0074; Mon, 3 Oct 2022 19:09:54 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 0F5096B0072 for ; Mon, 3 Oct 2022 19:09:54 -0400 (EDT) Received: from smtpin12.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay03.hostedemail.com (Postfix) with ESMTP id D02DFA018C for ; Mon, 3 Oct 2022 23:09:53 +0000 (UTC) X-FDA: 79981182666.12.E43BB30 Received: from mail.zytor.com (terminus.zytor.com [198.137.202.136]) by imf30.hostedemail.com (Postfix) with ESMTP id 4194480017 for ; Mon, 3 Oct 2022 23:09:52 +0000 (UTC) Received: from [127.0.0.1] ([73.223.250.219]) (authenticated bits=0) by mail.zytor.com (8.17.1/8.17.1) with ESMTPSA id 293N9Fbk3151198 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NO); Mon, 3 Oct 2022 16:09:15 -0700 DKIM-Filter: OpenDKIM Filter v2.11.0 mail.zytor.com 293N9Fbk3151198 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zytor.com; s=2022090501; t=1664838557; bh=xJZ6nhVm/uE8olKGBqYb8kGcNYZAUZBCq+szEAts8vs=; h=Date:From:To:CC:Subject:In-Reply-To:References:From; b=YDCWBOXA9dtO9GXhncKtVNe41sHgCGquhdh/jFCCdsUuYC7CPmt/x8BD78j+TZcWF vPb7yTkdH0GMIhvByh58AHAqpck5YinqAs4OBs2jmCH8VsxfXz78OqJvuvhxX5QQtJ NX6fNW0lfuwEISIHIhQ/Z0XquLZe4tG3cGPRlMVsyuHvrlAGD9I9iQmewd+Jgq1Lrm f1qAzmqshvoXI/KNYSIO02vFacZx1hxk8iEcDgdm9PgAg30eSnsIR1rqUHbX3PQ8XX W733g7fu59ey3VkOGbs8Lfb1VilDFxhr+hmDoY6IBNWiZ74uzYwp78lXHtm0ogZrmx GCfwjWud/boUg== Date: Mon, 03 Oct 2022 16:09:14 -0700 From: "H. Peter Anvin" To: Andy Lutomirski , Rick Edgecombe , x86@kernel.org, Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V . Shankar" , Weijiang Yang , "Kirill A . Shutemov" , joao.moreira@intel.com, John Allen , kcc@google.com, eranian@google.com, rppt@kernel.org, jamorris@linux.microsoft.com, dethoma@microsoft.com CC: Yu-cheng Yu , Michael Kerrisk Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_v2_07/39=5D_x86/cet=3A_Add_u?= =?US-ASCII?Q?ser_control-protection_fault_handler?= User-Agent: K-9 Mail for Android In-Reply-To: <4e145653-a62c-e4ea-dfa7-f18c0282c315@kernel.org> References: <20220929222936.14584-1-rick.p.edgecombe@intel.com> <20220929222936.14584-8-rick.p.edgecombe@intel.com> <4e145653-a62c-e4ea-dfa7-f18c0282c315@kernel.org> Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1664838592; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=xJZ6nhVm/uE8olKGBqYb8kGcNYZAUZBCq+szEAts8vs=; b=WpVLWSNdn62HFYVUn1UTyek5uUUVT/WM3k119cMFxfA4bYL2eNTlkUQYQAF+BRtu1dIDwd d+c9aOzzoheM70unJ/yCeuV7ZP7fb4ukXX6vA80PpYznlLv3VPC3wgjER6fituvs8gM0np wzHXB5BywlHbp3UMmVYeK9EVg6bpm6w= ARC-Authentication-Results: i=1; imf30.hostedemail.com; dkim=pass header.d=zytor.com header.s=2022090501 header.b=YDCWBOXA; dmarc=pass (policy=none) header.from=zytor.com; spf=pass (imf30.hostedemail.com: domain of hpa@zytor.com designates 198.137.202.136 as permitted sender) smtp.mailfrom=hpa@zytor.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1664838592; a=rsa-sha256; cv=none; b=LCS5Pk9ttdGlEeKVEUgjDRE+YYJdtSRoTRKsAMEJRbXE8Fei97Eti14GtmkOmB9p3OOY5j xC/LA3tgA+RUTaEqQrcjHyEMaSRRBVu8fWAU9+6+23yYFQwJrnekntB/H2FJYqQQkf40dq MB6QX1+oceWiUrhN9+QNFJbAGrQz5To= X-Rspam-User: X-Stat-Signature: aw3odz63i1ykohu84ygo41b515tmssb7 X-Rspamd-Queue-Id: 4194480017 Authentication-Results: imf30.hostedemail.com; dkim=pass header.d=zytor.com header.s=2022090501 header.b=YDCWBOXA; dmarc=pass (policy=none) header.from=zytor.com; spf=pass (imf30.hostedemail.com: domain of hpa@zytor.com designates 198.137.202.136 as permitted sender) smtp.mailfrom=hpa@zytor.com X-Rspamd-Server: rspam01 X-HE-Tag: 1664838592-581453 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On October 3, 2022 3:51:59 PM PDT, Andy Lutomirski wrot= e: >On 9/29/22 15:29, Rick Edgecombe wrote: >> From: Yu-cheng Yu >>=20 > >> +static void do_user_control_protection_fault(struct pt_regs *regs, >> + unsigned long error_code) >> { >> - if (!cpu_feature_enabled(X86_FEATURE_IBT)) { >> - pr_err("Unexpected #CP\n"); >> - BUG(); >> + struct task_struct *tsk; >> + unsigned long ssp; >> + >> + /* Read SSP before enabling interrupts=2E */ >> + rdmsrl(MSR_IA32_PL3_SSP, ssp); > + >> + cond_local_irq_enable(regs); > >I feel like I'm missing something=2E Either PL3_SSL is context switched = correctly and reading it with IRQs off is useless, or it's not context swit= ched, and I'm very confused=2E > >Please either improve the comment or move it after the cond_local_irq_ena= ble()=2E > >--Andy > >> + >> + if (!cpu_feature_enabled(X86_FEATURE_SHSTK)) >> + WARN_ONCE(1, "User-mode control protection fault with shadow support= disabled\n"); >> + >> + tsk =3D current; >> + tsk->thread=2Eerror_code =3D error_code; >> + tsk->thread=2Etrap_nr =3D X86_TRAP_CP; >> + >> + /* Ratelimit to prevent log spamming=2E */ >> + if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && >> + __ratelimit(&cpf_rate)) { >> + unsigned int cpec; >> + >> + cpec =3D error_code & CP_EC; >> + if (cpec >=3D ARRAY_SIZE(control_protection_err)) >> + cpec =3D 0; >> + >> + pr_emerg("%s[%d] control protection ip:%lx sp:%lx ssp:%lx error:%lx(= %s)%s", >> + tsk->comm, task_pid_nr(tsk), >> + regs->ip, regs->sp, ssp, error_code, >> + control_protection_err[cpec], >> + error_code & CP_ENCL ? " in enclave" : ""); >> + print_vma_addr(KERN_CONT " in ", regs->ip); >> + pr_cont("\n"); >> } >> - if (WARN_ON_ONCE(user_mode(regs) || (error_code & CP_EC) !=3D CP_EN= DBR)) >> - return; >> + force_sig_fault(SIGSEGV, SEGV_CPERR, (void __user *)0); >> + cond_local_irq_disable(regs); >> +} >> +#else >> +static void do_user_control_protection_fault(struct pt_regs *regs, >> + unsigned long error_code) >> +{ >> + WARN_ONCE(1, "User-mode control protection fault with shadow support = disabled\n"); >> +} >> +#endif >> + >> +#ifdef CONFIG_X86_KERNEL_IBT >> + >> +static __ro_after_init bool ibt_fatal =3D true; >> + >> +extern void ibt_selftest_ip(void); /* code label defined in asm below = */ >> +static void do_kernel_control_protection_fault(struct pt_regs *regs) >> +{ >> if (unlikely(regs->ip =3D=3D (unsigned long)&ibt_selftest_ip)) { >> regs->ax =3D 0; >> return; >> @@ -283,9 +335,29 @@ static int __init ibt_setup(char *str) >> } >> __setup("ibt=3D", ibt_setup); >> - >> +#else >> +static void do_kernel_control_protection_fault(struct pt_regs *regs) >> +{ >> + WARN_ONCE(1, "Kernel-mode control protection fault with IBT disabled\= n"); >> +} >> #endif /* CONFIG_X86_KERNEL_IBT */ >> +#if defined(CONFIG_X86_KERNEL_IBT) || defined(CONFIG_X86_SHADOW_STAC= K) >> +DEFINE_IDTENTRY_ERRORCODE(exc_control_protection) >> +{ >> + if (!cpu_feature_enabled(X86_FEATURE_IBT) && >> + !cpu_feature_enabled(X86_FEATURE_SHSTK)) { >> + pr_err("Unexpected #CP\n"); >> + BUG(); >> + } >> + >> + if (user_mode(regs)) >> + do_user_control_protection_fault(regs, error_code); >> + else >> + do_kernel_control_protection_fault(regs); >> +} >> +#endif /* defined(CONFIG_X86_KERNEL_IBT) || defined(CONFIG_X86_SHADOW_= STACK) */ >> + >> #ifdef CONFIG_X86_F00F_BUG >> void handle_invalid_op(struct pt_regs *regs) >> #else >> diff --git a/arch/x86/xen/enlighten_pv=2Ec b/arch/x86/xen/enlighten_pv= =2Ec >> index 0ed2e487a693=2E=2E57faa287163f 100644 >> --- a/arch/x86/xen/enlighten_pv=2Ec >> +++ b/arch/x86/xen/enlighten_pv=2Ec >> @@ -628,7 +628,7 @@ static struct trap_array_entry trap_array[] =3D { >> TRAP_ENTRY(exc_coprocessor_error, false ), >> TRAP_ENTRY(exc_alignment_check, false ), >> TRAP_ENTRY(exc_simd_coprocessor_error, false ), >> -#ifdef CONFIG_X86_KERNEL_IBT >> +#if defined(CONFIG_X86_KERNEL_IBT) || defined(CONFIG_X86_SHADOW_STACK) >> TRAP_ENTRY(exc_control_protection, false ), >> #endif >> }; >> diff --git a/arch/x86/xen/xen-asm=2ES b/arch/x86/xen/xen-asm=2ES >> index 6b4fdf6b9542=2E=2Ee45ff6300c7d 100644 >> --- a/arch/x86/xen/xen-asm=2ES >> +++ b/arch/x86/xen/xen-asm=2ES >> @@ -148,7 +148,7 @@ xen_pv_trap asm_exc_page_fault >> xen_pv_trap asm_exc_spurious_interrupt_bug >> xen_pv_trap asm_exc_coprocessor_error >> xen_pv_trap asm_exc_alignment_check >> -#ifdef CONFIG_X86_KERNEL_IBT >> +#if defined(CONFIG_X86_KERNEL_IBT) || defined(CONFIG_X86_SHADOW_STACK) >> xen_pv_trap asm_exc_control_protection >> #endif >> #ifdef CONFIG_X86_MCE >> diff --git a/include/uapi/asm-generic/siginfo=2Eh b/include/uapi/asm-ge= neric/siginfo=2Eh >> index ffbe4cec9f32=2E=2E0f52d0ac47c5 100644 >> --- a/include/uapi/asm-generic/siginfo=2Eh >> +++ b/include/uapi/asm-generic/siginfo=2Eh >> @@ -242,7 +242,8 @@ typedef struct siginfo { >> #define SEGV_ADIPERR 7 /* Precise MCD exception */ >> #define SEGV_MTEAERR 8 /* Asynchronous ARM MTE error */ >> #define SEGV_MTESERR 9 /* Synchronous ARM MTE exception */ >> -#define NSIGSEGV 9 >> +#define SEGV_CPERR 10 /* Control protection fault */ >> +#define NSIGSEGV 10 >> /* >> * SIGBUS si_codes > Could something change the value under a switched-out thread, though?