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Mon, 22 Sep 2025 08:54:54 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface MIME-Version: 1.0 X-ThreadId: AFFCV0QGVXfF Date: Mon, 22 Sep 2025 14:51:59 +0200 From: "Arnd Bergmann" To: "Xie Yuanbin" Cc: "Liam R. Howlett" , "Andrew Morton" , "Ard Biesheuvel" , "Dave Vasilevsky" , "David Hildenbrand" , "Eric Biggers" , "Kees Cook" , liaohua4@huawei.com, lilinjie8@huawei.com, linmiaohe@huawei.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, "Russell King" , "Lorenzo Stoakes" , "Michal Hocko" , nao.horiguchi@gmail.com, "Nathan Chancellor" , "Peter Zijlstra" , "Russell King" , "Steven Rostedt" , "Mike Rapoport" , "Suren Baghdasaryan" , "Vlastimil Babka" , "Will Deacon" Message-Id: <9c0cd24c-559b-4550-9fc8-5dc4bcc20bf7@app.fastmail.com> In-Reply-To: <20250922082843.26722-1-xieyuanbin1@huawei.com> References: <727caa4f-5be5-4b59-a10e-8dc9bbc384bf@app.fastmail.com> <20250922082843.26722-1-xieyuanbin1@huawei.com> Subject: Re: [RFC PATCH 1/2] ARM: mm: support memory-failure Content-Type: text/plain Content-Transfer-Encoding: 7bit X-Rspamd-Queue-Id: 6F62A20009 X-Rspamd-Server: rspam05 X-Stat-Signature: 51edcqu8x8a4zc37jik76m9y1qxpe8de X-Rspam-User: X-HE-Tag: 1758545696-46317 X-HE-Meta: U2FsdGVkX1+LOpiU54SSBY9TXMEjdjTaQqEQJklDmzhi1OMRmzzH1T+b54DFTlkvyQOKvyGi5PbThTFRv5WesurrcQAqlQhJy4ZwhLB2LjljtOgcIk9eAIF7Ye6zR61Yl5XCBRTxVKA9WMEPtpmGoQQuGVOZRiI1waB867pKv4NRRZhX5XzoTHwCj3FzF8bJsgmcWT61en5sgtjgqlN79wm5omHLuP2MezqPgSdQoSM1q2p30VNg/NaSUcwolQJAR6UMGzPDvs4umoL0yRjBnYVxDDVk+L5LYq4ytzVputKIKFrGLZCpelxdVZ/Ynarz6t4aa95yUuf6D7J/p+1Ql+iaUkhJzol2ooym0G21X0y+N5sH0FlUUukJszzKQtVSad0syFLX8v91IkhpjKyDXViSBOSw95JDBC5Lvga5o0hrNxy41VLZrCc7e9KopOvycnbuge3XE+1sfm8nQGOLjFeb7oLWk375hLaD5SKaoY1vJggKkz9310ojZa/i7EIcAYWRrFUhzDYd822GX4rWl55ykFTY3MmYKJLFpYJ23B5quCGnH9CDAZj0KcHdqrsd9wAoIUuW6yHRD25MqnK0HDhzZFl39HqqIKrAF8Dtmm9K+6JqhdpClt1OqeyOXUMnWjBUXcj6U8esvS9YJY+qtL0U2blCdX5I7VTIWPWyP8+aFKQeijevaqc/fnYxQOUIIp+Pu2Md8/HOEVpv9YSH1DraPJOMQZ92klUg6pFYfa+ibNSQBYyjgbisTXlV+1dnETa0UzrCypzkkb3moZZTEYrtp8RMV3v2h54HJHAaLVWnJN/mPdSGfFWVHrICpekj8kpC6wYqnumr+tfovzv2gY5ajO7eenOy3jBohqX8kc3nu2PwSD05a49xWjnL1k3VFroWqL7ebexhUkOqnxpXSwU2j2GkJSuT0DcOZd2qzJDuzhMEl/aVDzbJI3TPlqC7dnq6Npf42cck0DWWLny U3tUyMBv 96OZ/zlZ7jEj7zkmWutD6aMA4Yk7Wn2KpPlndPRjn2w6svlzzyyTPTOUCR2w7O8XxBsf9Z32WlIzRktIDJdmPmT/5odOaIBH//P1D2h4GIK1xZ9Ccr8rs672+OSbdZFuQiBWNlqTDxjdFFNrt8JGqMflC14orliQXRD1ZVt2Bm1y1FApDr/eCCYpkF8G7BS0NuLjcCpI22vUxtYB+lj6CAehBmqdlZMg0/Ml69HrYoPxV76/M3a4RO6NOCd7wQLnsXD3a X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Mon, Sep 22, 2025, at 10:28, Xie Yuanbin wrote: >> It would be helpful to be more specific about what you >> want to do with this. >> >> Are you working on a driver that would actually make use of >> the exported interface? > > Thanks for your reply. > > Yes, In fact, we have developed a hardware component to detect DDR bit > transitions (software does not sense the detection behavior). Once a bit > transition is detected, an interrupt is reported to the CPU. > > On the software side, we have developed a driver module ko to register > the interrupt callback to perform soft page offline to the corresponding > physical pages. > > In fact, we will export `soft_offline_page` for ko to use (we can ensure > that it is not called in the interrupt context), but I have looked at the > code and found that `memory_failure_queue` and `memory_failure` can also > be used, which are already exported. Ok >> I see only a very small number of >> drivers that call memory_failure(), and none of them are >> usable on Arm. > > I think that not all drivers are in the open source kernel code. > As far as I know, there should be similar third-party drivers in other > architectures that use memory-failure functions, like x86 or arm64. > I am not a specialist in drivers, so if I have made any mistakes, > please correct me. I'm not familiar with the memory-failure support, but this sounds like something that is usually done with a drivers/edac/ driver. There are many SoC specific drivers, including for 32-bit Arm SoCs. Have you considered adding an EDAC driver first? I don't know how the other platforms that have EDAC drivers handle failures, but I would assume that either that subsystem already contains functionality for taking pages offline, or this is something that should be done in a way that works for all of them without requiring an extra driver. Arnd