From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id BED0AC433F5 for ; Wed, 9 Feb 2022 18:01:03 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id EEB1E6B0074; Wed, 9 Feb 2022 13:01:02 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id E9C5E6B0075; Wed, 9 Feb 2022 13:01:02 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id D61E86B0078; Wed, 9 Feb 2022 13:01:02 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0062.hostedemail.com [216.40.44.62]) by kanga.kvack.org (Postfix) with ESMTP id C6ED56B0074 for ; Wed, 9 Feb 2022 13:01:02 -0500 (EST) Received: from smtpin13.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay04.hostedemail.com (Postfix) with ESMTP id 8A34395C8C for ; Wed, 9 Feb 2022 18:01:02 +0000 (UTC) X-FDA: 79124007564.13.1854997 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by imf21.hostedemail.com (Postfix) with ESMTP id 77F131C0017 for ; Wed, 9 Feb 2022 18:01:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1644429661; x=1675965661; h=message-id:date:mime-version:to:cc:references:from: subject:in-reply-to:content-transfer-encoding; bh=zo/OsIOkajIY3h3Rm1bLta5Xyt2Nd1Fi9wy9oJvB0kA=; b=Yd0pcODFgn8kjL7X4u1fVSi8p2cnoChelfJRnHbISPDx6LdMPfKTrkoC HcO5pbcmovEUH+X5XygHet7mVJJRs0/4LgHhT5MNSO/snAW+1hSdPw1sy cRqdFHF1NCXUOAxIpwQ3cllazoo95sOzfbBuYtddO/Eeg5lGhApfxVBC/ y5gdFDKP7X9qulSOs0n8/BD9UXmMILI6hSF8OtyX+o/UiHYrdLKMxxlpa B8eVHHQ5cwzw2uGO35oDkDAIu64EcyD3tK9tdUm1w+rsXkP45mvwUk0eZ LGzFWD6NvtQNenfufGLKj+6hGVS6+eNtFnfOYQ1MdPmyqkoX5AKXXyfnb Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10252"; a="249493304" X-IronPort-AV: E=Sophos;i="5.88,356,1635231600"; d="scan'208";a="249493304" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 10:00:34 -0800 X-IronPort-AV: E=Sophos;i="5.88,356,1635231600"; d="scan'208";a="485347306" Received: from sanvery-mobl.amr.corp.intel.com (HELO [10.212.232.139]) ([10.212.232.139]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Feb 2022 10:00:33 -0800 Message-ID: <95299e90-245b-61c5-8ef0-5e6da3c37c5e@intel.com> Date: Wed, 9 Feb 2022 10:00:30 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Content-Language: en-US To: Rick Edgecombe , x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V . Shankar" , Dave Martin , Weijiang Yang , "Kirill A . Shutemov" , joao.moreira@intel.com, John Allen , kcc@google.com, eranian@google.com Cc: Yu-cheng Yu References: <20220130211838.8382-1-rick.p.edgecombe@intel.com> <20220130211838.8382-12-rick.p.edgecombe@intel.com> From: Dave Hansen Subject: Re: [PATCH 11/35] x86/mm: Update pte_modify for _PAGE_COW In-Reply-To: <20220130211838.8382-12-rick.p.edgecombe@intel.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Rspamd-Queue-Id: 77F131C0017 X-Rspam-User: Authentication-Results: imf21.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=Yd0pcODF; spf=none (imf21.hostedemail.com: domain of dave.hansen@intel.com has no SPF policy when checking 192.55.52.115) smtp.mailfrom=dave.hansen@intel.com; dmarc=pass (policy=none) header.from=intel.com X-Stat-Signature: q4d7wpi91btnjahgb38dwqtr9ey9rf49 X-Rspamd-Server: rspam04 X-HE-Tag: 1644429661-187936 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 1/30/22 13:18, Rick Edgecombe wrote: > From: Yu-cheng Yu > > The read-only and Dirty PTE has been used to indicate copy-on-write pages. Nit: This is another opportunity to use consistent terminology for these Write=0,Dirty=1 PTEs. > However, newer x86 processors also regard a read-only and Dirty PTE as a > shadow stack page. In order to separate the two, the software-defined > _PAGE_COW is created to replace _PAGE_DIRTY for the copy-on-write case, and > pte_*() are updated. The tense here is weird. "_PAGE_COW is created" is present tense, but it refers to something that happened earlier in the series. > Pte_modify() changes a PTE to 'newprot', but it doesn't use the pte_*(). I'm not seeing a clear problem statement in there. It looks something like this to me: pte_modify() takes a "raw" pgprot_t which was not necessarily created with any of the existing PTE bit helpers. That means that it can return a pte_t with Write=0,Dirty=1: a shadow stack PTE when it did not intend to create one. But, this kinda looks like a hack to me. It all boils down to _PAGE_CHG_MASK. If pte_modify() can change the bit's value, it is not included in _PAGE_CHG_MASK. But, pte_modify() *CAN* change the _PAGE_DIRTY value now. Another way of saying it is that _PAGE_DIRTY is now a permission bit (part-time, at least). > diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h > index a4a75e78a934..5c3886f6ccda 100644 > --- a/arch/x86/include/asm/pgtable.h > +++ b/arch/x86/include/asm/pgtable.h > @@ -773,6 +773,23 @@ static inline pmd_t pmd_mkinvalid(pmd_t pmd) > > static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask); > > +static inline pteval_t fixup_dirty_pte(pteval_t pteval) > +{ > + pte_t pte = __pte(pteval); > + > + /* > + * Fix up potential shadow stack page flags because the RO, Dirty > + * PTE is special. > + */ > + if (cpu_feature_enabled(X86_FEATURE_SHSTK)) { > + if (pte_dirty(pte)) { > + pte = pte_mkclean(pte); > + pte = pte_mkdirty(pte); > + } > + } > + return pte_val(pte); > +} > + > static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) > { > pteval_t val = pte_val(pte), oldval = val; > @@ -783,16 +800,36 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) > */ > val &= _PAGE_CHG_MASK; > val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; > + val = fixup_dirty_pte(val); > val = flip_protnone_guard(oldval, val, PTE_PFN_MASK); > return __pte(val); > } Maybe something like this? We can take _PAGE_DIRTY out of _PAGE_CHG_MASK, then the p*_modify() functions look like this: static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pteval_t val = pte_val(pte), oldval = val; + pte_t pte_result; /* Chop off any bits that might change with 'newprot': */ val &= _PAGE_CHG_MASK; val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; val = flip_protnone_guard(oldval, val, PTE_PFN_MASK); + pte_result = __pte(val); + + if (pte_dirty(oldval)) + pte_result = pte_mkdirty(pte_result)); + + return pte_result; } This: 1. Makes logical sense: the dirty bit *IS* special in that it has to be logically preserved across permission changes. 2. Would work with or without shadow stacks. That exact code would even work on a non-shadow-stack kernel 3. Doesn't introduce *any* new shadow-stack conditional code; the one already hidden in pte_mkdirty() is sufficient. 4. Avoids silly things like setting a bit and then immediately clearing it in a "fixup". 5. Removes the opaque "fixup" abstraction function. That's way better if I do say so myself.