From: Yicong Yang <yangyicong@huawei.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: <yangyicong@hisilicon.com>, <akpm@linux-foundation.org>,
<linux-mm@kvack.org>, <linux-arm-kernel@lists.infradead.org>,
<x86@kernel.org>, <mark.rutland@arm.com>, <ryan.roberts@arm.com>,
<will@kernel.org>, <anshuman.khandual@arm.com>,
<linux-doc@vger.kernel.org>, <corbet@lwn.net>,
<peterz@infradead.org>, <arnd@arndb.de>,
<punit.agrawal@bytedance.com>, <linux-kernel@vger.kernel.org>,
<darren@os.amperecomputing.com>, <huzhanyuan@oppo.com>,
<lipeifeng@oppo.com>, <zhangshiming@oppo.com>, <guojian@oppo.com>,
<realmz6@gmail.com>, <linux-mips@vger.kernel.org>,
<openrisc@lists.librecores.org>, <linuxppc-dev@lists.ozlabs.org>,
<linux-riscv@lists.infradead.org>, <linux-s390@vger.kernel.org>,
Barry Song <21cnbao@gmail.com>, <wangkefeng.wang@huawei.com>,
<xhao@linux.alibaba.com>, <prime.zeng@hisilicon.com>,
<Jonathan.Cameron@huawei.com>, Barry Song <v-songbaohua@oppo.com>,
Nadav Amit <namit@vmware.com>, Mel Gorman <mgorman@suse.de>
Subject: Re: [PATCH v10 4/4] arm64: support batched/deferred tlb shootdown during page reclamation/migration
Date: Mon, 17 Jul 2023 20:26:10 +0800 [thread overview]
Message-ID: <9438aa19-8eb5-a36a-c4a0-6c8333665637@huawei.com> (raw)
In-Reply-To: <ZLQIvPpKvjWppc59@arm.com>
On 2023/7/16 23:11, Catalin Marinas wrote:
> On Mon, Jul 10, 2023 at 04:39:14PM +0800, Yicong Yang wrote:
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 7856c3a3e35a..f0ce8208c57f 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -96,6 +96,7 @@ config ARM64
>> select ARCH_SUPPORTS_NUMA_BALANCING
>> select ARCH_SUPPORTS_PAGE_TABLE_CHECK
>> select ARCH_SUPPORTS_PER_VMA_LOCK
>> + select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if EXPERT
>
> I don't want EXPERT to turn on a feature that's not selectable by the
> user. This would lead to different performance behaviour based on
> EXPERT. Just select it unconditionally.
Got it. will drop it and address the comment below.
Thanks.
>
>> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
>> index 412a3b9a3c25..4bb9cec62e26 100644
>> --- a/arch/arm64/include/asm/tlbflush.h
>> +++ b/arch/arm64/include/asm/tlbflush.h
>> @@ -254,17 +254,23 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
>> dsb(ish);
>> }
>>
>> -static inline void flush_tlb_page_nosync(struct vm_area_struct *vma,
>> - unsigned long uaddr)
>> +static inline void __flush_tlb_page_nosync(struct mm_struct *mm,
>> + unsigned long uaddr)
>> {
>> unsigned long addr;
>>
>> dsb(ishst);
>> - addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));
>> + addr = __TLBI_VADDR(uaddr, ASID(mm));
>> __tlbi(vale1is, addr);
>> __tlbi_user(vale1is, addr);
>> }
>>
>> +static inline void flush_tlb_page_nosync(struct vm_area_struct *vma,
>> + unsigned long uaddr)
>> +{
>> + return __flush_tlb_page_nosync(vma->vm_mm, uaddr);
>> +}
>> +
>> static inline void flush_tlb_page(struct vm_area_struct *vma,
>> unsigned long uaddr)
>> {
>> @@ -272,6 +278,42 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,
>> dsb(ish);
>> }
>>
>> +#ifdef CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH
>
> If it's selected unconditionally, we won't need this #ifdef here.
>
>> +
>> +static inline bool arch_tlbbatch_should_defer(struct mm_struct *mm)
>> +{
>> +#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
>> + /*
>> + * TLB flush deferral is not required on systems, which are affected with
>
> "affected by" and drop the comma before "which".
>
prev parent reply other threads:[~2023-07-17 12:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-10 8:39 [PATCH v10 0/4] " Yicong Yang
2023-07-10 8:39 ` [PATCH v10 1/4] mm/tlbbatch: Introduce arch_tlbbatch_should_defer() Yicong Yang
2023-07-10 8:39 ` [PATCH v10 2/4] mm/tlbbatch: Rename and extend some functions Yicong Yang
2023-07-10 8:39 ` [PATCH v10 3/4] mm/tlbbatch: Introduce arch_flush_tlb_batched_pending() Yicong Yang
2023-07-10 8:39 ` [PATCH v10 4/4] arm64: support batched/deferred tlb shootdown during page reclamation/migration Yicong Yang
2023-07-16 15:11 ` Catalin Marinas
2023-07-17 12:26 ` Yicong Yang [this message]
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