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From: Dave Hansen <dave.hansen@intel.com>
To: Jann Horn <jannh@google.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>
Cc: Muchun Song <muchun.song@linux.dev>,
	Oscar Salvador <osalvador@suse.de>,
	Vitaly Chikunov <vt@altlinux.org>,
	linux-kernel@vger.kernel.org, linux-mm@kvack.org,
	stable@vger.kernel.org
Subject: Re: [PATCH] x86/mm: Disable hugetlb page table sharing on non-PAE 32-bit
Date: Mon, 30 Jun 2025 13:39:37 -0700	[thread overview]
Message-ID: <9179e1cd-d635-4e70-931e-4a85c2e6932b@intel.com> (raw)
In-Reply-To: <20250630-x86-2level-hugetlb-v1-1-077cd53d8255@google.com>

On 6/30/25 12:07, Jann Horn wrote:
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -147,7 +147,7 @@ config X86
>  	select ARCH_WANTS_DYNAMIC_TASK_STRUCT
>  	select ARCH_WANTS_NO_INSTR
>  	select ARCH_WANT_GENERAL_HUGETLB
> -	select ARCH_WANT_HUGE_PMD_SHARE
> +	select ARCH_WANT_HUGE_PMD_SHARE		if PGTABLE_LEVELS > 2
>  	select ARCH_WANT_LD_ORPHAN_WARN
>  	select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP	if X86_64
>  	select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP	if X86_64

Does pmd sharing really even work on 32-bit? Just practically, you only
ever have 3GB of address space and thus 3 possible PGDs that can be used
for sharing (with the 3:1 split configured). You presumably need *some*
address space for the binary to even execve(). The vdso and friends go
somewhere and we normally don't let anything get mapped at 0x0.

I think that leaves _maybe_ one slot.

Barring something some specific and compelling actual use case, this
should probably just be:

	select ARCH_WANT_HUGE_PMD_SHARE if X86_64


  parent reply	other threads:[~2025-06-30 20:39 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-30 19:07 Jann Horn
2025-06-30 20:23 ` Vitaly Chikunov
2025-06-30 20:39 ` Dave Hansen [this message]
2025-07-01 10:33   ` Jann Horn

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