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From: Zi Yan <ziy@nvidia.com>
To: Ryan Roberts <ryan.roberts@arm.com>
Cc: Matthew Wilcox <willy@infradead.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	David Hildenbrand <david@redhat.com>,
	Dave Chinner <david@fromorbit.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org,
	linux-mm@kvack.org
Subject: Re: [PATCH v3] mm/filemap: Allow arch to request folio size for exec memory
Date: Fri, 28 Mar 2025 09:32:58 -0400	[thread overview]
Message-ID: <8DEB30F0-52D0-4857-9BAC-CDAC045A396E@nvidia.com> (raw)
In-Reply-To: <dfc06a39-3d92-4995-ab06-c552e351f7c8@arm.com>

On 28 Mar 2025, at 9:09, Ryan Roberts wrote:

> On 27/03/2025 20:07, Zi Yan wrote:
>> On 27 Mar 2025, at 12:44, Matthew Wilcox wrote:
>>
>>> On Thu, Mar 27, 2025 at 04:06:58PM +0000, Ryan Roberts wrote:
>>>> So let's special-case the read(ahead) logic for executable mappings. The
>>>> trade-off is performance improvement (due to more efficient storage of
>>>> the translations in iTLB) vs potential read amplification (due to
>>>> reading too much data around the fault which won't be used), and the
>>>> latter is independent of base page size. I've chosen 64K folio size for
>>>> arm64 which benefits both the 4K and 16K base page size configs and
>>>> shouldn't lead to any read amplification in practice since the old
>>>> read-around path was (usually) reading blocks of 128K. I don't
>>>> anticipate any write amplification because text is always RO.
>>>
>>> Is there not also the potential for wasted memory due to ELF alignment?
>>> Kalesh talked about it in the MM BOF at the same time that Ted and I
>>> were discussing it in the FS BOF.  Some coordination required (like
>>> maybe Kalesh could have mentioned it to me rathere than assuming I'd be
>>> there?)
>>>
>>>> +#define arch_exec_folio_order() ilog2(SZ_64K >> PAGE_SHIFT)
>>>
>>> I don't think the "arch" really adds much value here.
>>>
>>> #define exec_folio_order()	get_order(SZ_64K)
>>
>> How about AMD’s PTE coalescing, which does PTE compression at
>> 16KB or 32KB level? It covers 4 16KB and 2 32KB, at least it will
>> not hurt AMD PTE coalescing. Starting with 64KB across all arch
>> might be simpler to see the performance impact. Just a comment,
>> no objection. :)
>
> exec_folio_order() is defined per-architecture and SZ_64K is the arm64 preferred
> size. At the moment x86 is not opted in, but they could choose to opt in with
> 32K (or whatever else makese sense) if the HW supports coalescing.

Oh, I missed that part. I thought, since arch_ is not there, it was the same
for all arch.

>
> I'm not sure if you thought this was global and are arguing against that, or if
> you are arguing for it to be global because it will more easily show us
> performance regressions earlier if x86 is doing this too?

I thought it was global. It might be OK to set it global and let different arch
to optimize it as it rolls out. Opt-in might be "never" until someone looks
into it, but if it is global and it changes performance, people will notice
and look into it.

--
Best Regards,
Yan, Zi


  reply	other threads:[~2025-03-28 13:33 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-27 16:06 Ryan Roberts
2025-03-27 16:44 ` Matthew Wilcox
2025-03-27 20:23   ` Ryan Roberts
2025-03-28 19:14     ` Matthew Wilcox
2025-03-29 10:07       ` Ryan Roberts
2025-04-01  7:19         ` Kalesh Singh
2025-04-01 10:35           ` Ryan Roberts
2025-04-01 17:55             ` Kalesh Singh
2025-04-02 13:40               ` Ryan Roberts
2025-03-28  0:07   ` Zi Yan
2025-03-28 13:09     ` Ryan Roberts
2025-03-28 13:32       ` Zi Yan [this message]
2025-03-28 13:50         ` Ryan Roberts

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