From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C84D0C76196 for ; Tue, 11 Apr 2023 01:32:37 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 671BB280045; Mon, 10 Apr 2023 21:32:37 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 621EC28003C; Mon, 10 Apr 2023 21:32:37 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 5111A280045; Mon, 10 Apr 2023 21:32:37 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0016.hostedemail.com [216.40.44.16]) by kanga.kvack.org (Postfix) with ESMTP id 3FA7228003C for ; Mon, 10 Apr 2023 21:32:37 -0400 (EDT) Received: from smtpin27.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay02.hostedemail.com (Postfix) with ESMTP id 15132120925 for ; Tue, 11 Apr 2023 01:32:37 +0000 (UTC) X-FDA: 80667385554.27.F8ABA66 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by imf09.hostedemail.com (Postfix) with ESMTP id 1078D140005 for ; Tue, 11 Apr 2023 01:32:34 +0000 (UTC) Authentication-Results: imf09.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=KCJqGbJA; dmarc=pass (policy=none) header.from=intel.com; spf=pass (imf09.hostedemail.com: domain of ying.huang@intel.com designates 192.55.52.88 as permitted sender) smtp.mailfrom=ying.huang@intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1681176755; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=6EjISWp5WkbC4p6O2uKuRvwjZS8MWWzDn4gyZOt9qX8=; b=vA/G02pS1Z4slkv0urGLy8sWy3mOUBaZQagVvXMRqPDZwCgpaMCizKYYKmwGRZWuBVhK+b wnJOIDDNmvikQh/JPLn2tnwKTDQ4fJdvBqGqgdxSDu3QqIhL3d8o664+21dgn+tiBnZ/gS uuC6ceUdWCZzwT1Uw15MFf8mPhXwXaA= ARC-Authentication-Results: i=1; imf09.hostedemail.com; dkim=pass header.d=intel.com header.s=Intel header.b=KCJqGbJA; dmarc=pass (policy=none) header.from=intel.com; spf=pass (imf09.hostedemail.com: domain of ying.huang@intel.com designates 192.55.52.88 as permitted sender) smtp.mailfrom=ying.huang@intel.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1681176755; a=rsa-sha256; cv=none; b=buaQtD/fzVzIa5h8gSAlgP4J3kLlI504+MR/j1qmF+43rEfkNykc1jpX+mDK4akXZoxKyi Om5bDfF9/1XmjUGaWNtg0HOfRXTMlPsoZc1WLNu96lmigkodos5vKA1jisFLIMI8ELZhr5 xsfFqVJ4lAJsUPpvcEdSQnHjt468AHY= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1681176755; x=1712712755; h=from:to:cc:subject:references:date:in-reply-to: message-id:mime-version:content-transfer-encoding; bh=6uciC4UroIaZtzRZeYdo8iufB2WP1MTDBI57Zm/g/XA=; b=KCJqGbJAYBmEvGl9SyieFC58w+jxkMxTK3bJ+LO3LPkr3z6ecn7aU+Ed 5gvystuhSODJK8zTmYbBQb3kyWOU0lgxJipdnT44BB65Iu4QcPdf+yAgv 3s/jeEnmB+mL6UbUA8wAfYv6pc3Oi/mK26zRNoLBPhiTBJFspDMHtO28p gwXMCy9NQSLlYY9v2/9OXBNsCUeEb5Wsaegtb2nAzQ9iXll4lGQ3Be/qu jdLHzrHGGYKGO4h82kFLZHjop2ApJLq1X3grnsQSsdeWtVPZT1egVRn9U aS8fj5QcC2Vjh5NndjcQ3qDSghnZ3Wcwc9D7pvR65c/2jx37RdGesJv1e g==; X-IronPort-AV: E=McAfee;i="6600,9927,10676"; a="371343470" X-IronPort-AV: E=Sophos;i="5.98,335,1673942400"; d="scan'208";a="371343470" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Apr 2023 18:32:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10676"; a="688434314" X-IronPort-AV: E=Sophos;i="5.98,335,1673942400"; d="scan'208";a="688434314" Received: from yhuang6-desk2.sh.intel.com (HELO yhuang6-desk2.ccr.corp.intel.com) ([10.238.208.55]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Apr 2023 18:32:31 -0700 From: "Huang, Ying" To: Nadav Amit Cc: Andrew Morton , "linux-mm@kvack.org" , "linux-kernel@vger.kernel.org" , kernel test robot , "Mel Gorman" , Hugh Dickins , Matthew Wilcox , David Hildenbrand Subject: Re: [PATCH] mm,unmap: avoid flushing TLB in batch if PTE is inaccessible References: <20230410075224.827740-1-ying.huang@intel.com> <402A3E9D-5136-4747-91FF-C3AA2D557784@vmware.com> Date: Tue, 11 Apr 2023 09:31:25 +0800 In-Reply-To: <402A3E9D-5136-4747-91FF-C3AA2D557784@vmware.com> (Nadav Amit's message of "Mon, 10 Apr 2023 19:47:30 +0000") Message-ID: <87zg7f19xu.fsf@yhuang6-desk2.ccr.corp.intel.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Rspamd-Queue-Id: 1078D140005 X-Rspamd-Server: rspam09 X-Rspam-User: X-Stat-Signature: zxmhj7ji97kqrxzx9kqg6m5s66zpizm1 X-HE-Tag: 1681176754-356774 X-HE-Meta: U2FsdGVkX1+ediIZD35h9yUBTZVt+haQ4xieiPQp1eynMApoSztBAOFk0U134ekDWeAwit1+VAUo3FWTdnhY7+NnlyHBbAsr7//Q8pFMh5Y2odd9wWIdf0r8juxkkNfbhDtuOvzqmZsgbwZ9xkoJuRYBsVjqgGDtXXXAcYRnQiB7sCws674gubaG8uBvK8S9I1D4ZDEL5zBSIKcpDxasVnbnPvxqrP4PhRcPDSA5fh7jHAQu9inmSmJcsCxfXQa63KEEsmA1bqN8jlJ9o3RgCXqyf6DplPuHqfDjWhBVSfjuJh5+PmbliNxbMd+KT7xR5DUlsumZ7uG5SfrA/1TzkwiiuAbM2Mlj1fam+mqOisgEePNH5Qtt1aEIidRFh81IhwYMAhyXGmdszw/C+p3VAAXqTQQIs/hbroDtRIM+5lPYJIUx8Kb/AWhhz2r1bDC6kcxOTLOL4RLQG3xKc/SE+R3SDGb4VGDfs2knrMcEQf5PN3c8Ll/Yu/DxGKWhyHX0+3eI5T3BDlq+irfdJisD3dNsUjNRAlOHfznQzM63hdoG1y2NU15vIasojFpC/CefmuMBTl4U32lSPhXbpr6mduVhfCnE1IIouz09Li1itrcR7/mLvGS7b2V5NDEUJiAK7QN2cv/o9iRnrKivxf/lCCsplPjVNUXIOm0xtnRts8bdzYIgI4nRMh/cvM6RC1yPLufTiCK7ORlNhP6+3xneHtX2Vwu+C2mo077gS0bRUJxnNAC9UpWcyMH58/oiH9BAxROrZFbzQkLAoLgFd2U46hhBbj2cH6CaSTracsXUs4G6qQQIWtviS5eKzIpGuz8ATbuBc8UxS8sK0nc8kFi+3Uo+xmigvRb8YFNgX6gzsmnQHI5hGcIrq7DJRf+eBgQs8KrGOLUZd3XSMRGyhMXwHU5DyRmzC1g7zphKE2fQUyuUDjbMbeDPzWoVFdeab/ccPkquwkLTMUuzUsG0Bz2 ilDGcVDV pcPAxWgafAIM9X+kYURc53lEk5G6KDAuCw+P5nzM4JTWLylwHF/ayD1JwXZaU9hPdUTkxZ2W/N5FwyqvGd6HjGtdDQzRPLq8IBNwmu18Pef4o9Ns2s8DiM4Gqw3QNrgreGuy0hnceZ4XcoE4zdz4wwxQDm+5deQ1jA7nSRVpp6dNWKM9l9Jkdz12ToIpHa1aFHVL8eD2s/0/msLkRqiveez11fsDasOjeVSIjYbgkyQrBSQBPPGmEnpSF+6QQG6qPL+OTpE9Is1KVzk87RKhvXou7+CVCFuXMAKpDKaA0Z2SzyTXCAw63cgL10qD7QDXqPoXZ0drYMzXhFnat71jjL6nPCgYBS5qF4l3+Vt3V3JMUyE8= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi, Amit, Thank you very much for review! Nadav Amit writes: >> On Apr 10, 2023, at 12:52 AM, Huang Ying wrote: >>=20 >> 0Day/LKP reported a performance regression for commit >> 7e12beb8ca2a ("migrate_pages: batch flushing TLB"). In the commit, the >> TLB flushing during page migration is batched. So, in >> try_to_migrate_one(), ptep_clear_flush() is replaced with >> set_tlb_ubc_flush_pending(). In further investigation, it is found >> that the TLB flushing can be avoided in ptep_clear_flush() if the PTE >> is inaccessible. In fact, we can optimize in similar way for the >> batched TLB flushing too to improve the performance. >>=20 >> So in this patch, we check pte_accessible() before >> set_tlb_ubc_flush_pending() in try_to_unmap/migrate_one(). Tests show >> that the benchmark score of the anon-cow-rand-mt test case of >> vm-scalability test suite can improve up to 2.1% with the patch on a >> Intel server machine. The TLB flushing IPI can reduce up to 44.3%. > > LGTM. Thanks! > I know it=E2=80=99s meaningless for x86 (but perhaps ARM would use this i= nfra > too): do we need smp_mb__after_atomic() after ptep_get_and_clear() and > before pte_accessible()? Why do we need the memory barrier? IIUC, the PTL is locked, so PTE value will not be changed under us. Anything else? > In addition, if this goes into stable (based on the Fixes tag), consider > breaking it into 2 patches, when only one would be backported. The fixed commit (7e12beb8ca2a ("migrate_pages: batch flushing TLB")) is merged by v6.3-rc1. So this patch will only be backported to v6.3 and later. Is it OK? Best Regards, Huang, Ying