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From: "Huang, Ying" <ying.huang@intel.com>
To: Gregory Price <gourry@gourry.net>
Cc: linux-mm@kvack.org,  akpm@linux-foundation.org,
	 dave.jiang@intel.com, Jonathan.Cameron@huawei.com,
	 horenchuang@bytedance.com, linux-kernel@vger.kernel.org,
	 linux-acpi@vger.kernel.org, dan.j.williams@intel.com,
	 lenb@kernel.org
Subject: Re: [PATCH] acpi/hmat,mm/memtier: always register hmat adist calculation callback
Date: Mon, 29 Jul 2024 09:02:33 +0800	[thread overview]
Message-ID: <87ttg91046.fsf@yhuang6-desk2.ccr.corp.intel.com> (raw)
In-Reply-To: <20240726215548.10653-1-gourry@gourry.net> (Gregory Price's message of "Fri, 26 Jul 2024 17:55:48 -0400")

Gregory Price <gourry@gourry.net> writes:

> In the event that hmat data is not available for the DRAM tier,
> or if it is invalid (bandwidth or latency is 0), we can still register
> a callback to calculate the abstract distance for non-cpu nodes
> and simply assign it a different tier manually.
>
> In the case where DRAM HMAT values are missing or not sane we
> manually assign adist=(MEMTIER_ADISTANCE_DRAM + MEMTIER_CHUNK_SIZE).
>
> If the HMAT data for the non-cpu tier is invalid (e.g. bw = 0), we
> cannot reasonable determine where to place the tier, so it will default
> to MEMTIER_ADISTANCE_DRAM (which is the existing behavior).

Why do we need this?  Do you have machines with broken HMAT table?  Can
you ask the vendor to fix the HMAT table?

--
Best Regards,
Huang, Ying

> Signed-off-by: Gregory Price <gourry@gourry.net>
> ---
>  drivers/acpi/numa/hmat.c |  6 ++++--
>  mm/memory-tiers.c        | 10 ++++++++--
>  2 files changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
> index 2c8ccc91ebe6..1642d2bd83b5 100644
> --- a/drivers/acpi/numa/hmat.c
> +++ b/drivers/acpi/numa/hmat.c
> @@ -1080,8 +1080,10 @@ static __init int hmat_init(void)
>  	if (hotplug_memory_notifier(hmat_callback, HMAT_CALLBACK_PRI))
>  		goto out_put;
>  
> -	if (!hmat_set_default_dram_perf())
> -		register_mt_adistance_algorithm(&hmat_adist_nb);
> +	if (hmat_set_default_dram_perf())
> +		pr_notice("Failed to set default dram perf\n");
> +
> +	register_mt_adistance_algorithm(&hmat_adist_nb);
>  
>  	return 0;
>  out_put:
> diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c
> index 6632102bd5c9..43bd508938ae 100644
> --- a/mm/memory-tiers.c
> +++ b/mm/memory-tiers.c
> @@ -765,8 +765,14 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
>  	    perf->read_bandwidth + perf->write_bandwidth == 0)
>  		return -EINVAL;
>  
> -	if (default_dram_perf_ref_nid == NUMA_NO_NODE)
> -		return -ENOENT;
> +	/*
> +	 * If the DRAM tier did not have valid HMAT data, we can instead just
> +	 * assume that the non-cpu numa nodes are 1 tier below cpu nodes
> +	 */
> +	if (default_dram_perf_ref_nid == NUMA_NO_NODE) {
> +		*adist = MEMTIER_ADISTANCE_DRAM + MEMTIER_CHUNK_SIZE;
> +		return 0;
> +	}
>  
>  	/*
>  	 * The abstract distance of a memory node is in direct proportion to


  reply	other threads:[~2024-07-29  1:06 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-26 21:55 Gregory Price
2024-07-29  1:02 ` Huang, Ying [this message]
2024-07-29 14:22   ` Gregory Price
2024-07-30  1:12     ` Huang, Ying
2024-07-30  3:18       ` Gregory Price
2024-07-31  1:22         ` Huang, Ying
2024-07-30 19:58           ` Gregory Price
2024-07-31  7:20             ` Huang, Ying
2024-07-30 20:26               ` Gregory Price
2024-08-27 14:33           ` Gregory Price
2024-07-30  5:19       ` Gregory Price
2024-07-30  6:12         ` Gregory Price
2024-07-31  1:10         ` Huang, Ying

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