From: Andi Kleen <andi@firstfloor.org>
To: "Michaâ Nazarewicz" <m.nazarewicz@samsung.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
Andrew Morton <akpm@linux-foundation.org>,
linux-kernel@vger.kernel.org, m.szyprowski@samsung.com,
kyungmin.park@samsung.com, linux-mm@kvack.org
Subject: Re: [PATCH] Physical Memory Management [0/1]
Date: Thu, 14 May 2009 21:33:11 +0200 [thread overview]
Message-ID: <87skj7pjig.fsf@basil.nowhere.org> (raw)
In-Reply-To: <op.utw4fdhz7p4s8u@amdc030> (=?iso-8859-1?Q?Micha=E2?= Nazarewicz's message of "Thu, 14 May 2009 13:48:39 +0200")
Michaa Nazarewicz <m.nazarewicz@samsung.com> writes:
>
> The idea here is that there are n hardware accelerators, each
> can operate on 1MiB blocks (to simplify assume that's the case).
You could just define a hugepage size for that and use hugetlbfs
with a few changes to map in pages with multiple PTEs.
It supports boot time reservation and is a well established
interface.
On x86 that would give 2MB units, on other architectures whatever
you prefer.
-Andi
--
ak@linux.intel.com -- Speaking for myself only.
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prev parent reply other threads:[~2009-05-14 19:32 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <op.utu26hq77p4s8u@amdc030>
2009-05-13 22:11 ` Andrew Morton
2009-05-14 9:00 ` Michał Nazarewicz
2009-05-14 11:20 ` Peter Zijlstra
2009-05-14 11:48 ` Michał Nazarewicz
2009-05-14 12:05 ` Peter Zijlstra
2009-05-14 13:04 ` Michał Nazarewicz
2009-05-14 17:07 ` Andrew Morton
2009-05-14 17:10 ` Peter Zijlstra
2009-05-15 10:06 ` Michał Nazarewicz
2009-05-15 10:18 ` Andi Kleen
2009-05-15 10:47 ` Michał Nazarewicz
2009-05-15 11:03 ` Peter Zijlstra
2009-05-15 11:11 ` Michał Nazarewicz
2009-05-15 11:26 ` Andi Kleen
2009-05-15 12:05 ` Michał Nazarewicz
2009-05-14 19:33 ` Andi Kleen [this message]
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