From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1263EC00140 for ; Tue, 9 Aug 2022 01:58:56 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 6C1858E0001; Mon, 8 Aug 2022 21:58:56 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 66FEF6B0072; Mon, 8 Aug 2022 21:58:56 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 510078E0001; Mon, 8 Aug 2022 21:58:56 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0010.hostedemail.com [216.40.44.10]) by kanga.kvack.org (Postfix) with ESMTP id 42D326B0071 for ; Mon, 8 Aug 2022 21:58:56 -0400 (EDT) Received: from smtpin26.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay08.hostedemail.com (Postfix) with ESMTP id 1299914013D for ; Tue, 9 Aug 2022 01:58:56 +0000 (UTC) X-FDA: 79778395872.26.C05914D Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by imf01.hostedemail.com (Postfix) with ESMTP id 0469040175 for ; Tue, 9 Aug 2022 01:58:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660010335; x=1691546335; h=from:to:cc:subject:references:date:in-reply-to: message-id:mime-version; bh=RlaPrnZTMn8a7D4INhrGFBRQasRa3QIzJxy1+34JrEA=; b=FIp8VYbnmwqqD8g5/OpUtuJ9Fgfam1NsLscybBTarZC77UIohhFpRmA4 JAFPkBWvSH+tPfLZph3qLNMOTEoIRsJThNxftB+2NQLRvSAEAHH1+ojr/ FETD/cGpZsawz10b/FlRiRPAxOPJoCuwsP+ZJFlLK+PaMGV74lkxJEZ2Z 0gwQC6AWL5iMJX+QglPdXZebE+RqEtHWweAOpFbLlkPyO+n5BwxPnun8d qeh0BMhubGLV0LaiJT640YMCoWwvlGr9ADSru+fAzkLhVDoQ3uLVMAHtC MtNUu+xF+SvZNvWWenaVzwmX2W/r9OwhIKiDVswBTkbZN+T2RDpzoN0/g Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10433"; a="270507418" X-IronPort-AV: E=Sophos;i="5.93,223,1654585200"; d="scan'208";a="270507418" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2022 18:58:53 -0700 X-IronPort-AV: E=Sophos;i="5.93,223,1654585200"; d="scan'208";a="580603968" Received: from yhuang6-desk2.sh.intel.com (HELO yhuang6-desk2.ccr.corp.intel.com) ([10.238.208.55]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2022 18:58:49 -0700 From: "Huang, Ying" To: "Aneesh Kumar K.V" Cc: linux-mm@kvack.org, akpm@linux-foundation.org, Wei Xu , Yang Shi , Davidlohr Bueso , Tim C Chen , Michal Hocko , Linux Kernel Mailing List , Hesham Almatary , Dave Hansen , Jonathan Cameron , Alistair Popple , Dan Williams , Johannes Weiner , jvgediya.oss@gmail.com Subject: Re: [PATCH v13 1/9] mm/demotion: Add support for explicit memory tiers References: <20220808062601.836025-1-aneesh.kumar@linux.ibm.com> <20220808062601.836025-2-aneesh.kumar@linux.ibm.com> Date: Tue, 09 Aug 2022 09:58:40 +0800 In-Reply-To: <20220808062601.836025-2-aneesh.kumar@linux.ibm.com> (Aneesh Kumar K. V.'s message of "Mon, 8 Aug 2022 11:55:53 +0530") Message-ID: <87sfm6gotr.fsf@yhuang6-desk2.ccr.corp.intel.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/27.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=ascii ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1660010335; a=rsa-sha256; cv=none; b=SH1yXbuaXhYFvetQ6uuKFaddt+rvFHjy/h/hMucBy0iGuyLVCBHdtNBiwHbRB3oiMuVS5J wTaQUQaIeCfYGLRXJ6RIG6jpTHCNveBM0nXzJZCH/LqBfowc5+Q7lwI+SMsGLYuFO5eMC5 W4anwx4VCOYQ6pXnNbk4LkwnvlXJ8qc= ARC-Authentication-Results: i=1; imf01.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=FIp8VYbn; spf=pass (imf01.hostedemail.com: domain of ying.huang@intel.com designates 192.55.52.136 as permitted sender) smtp.mailfrom=ying.huang@intel.com; dmarc=pass (policy=none) header.from=intel.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1660010335; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=BrqBXv35S5z+LLZQUygg8qkysuWe4r6KGs0xDYPmT1k=; b=qRt8GQyrKcKSKaMErN17pxcpCVRVnPEBMCFKQWQx1TlcNEwu/mLQRGJVYvev0G1+A6dASm OinZq69Ctig9q2vUZT6KovEVtG4VTsyRXcZa57u03LP5k10904yDzv/u1DAKWYu/ybcNR1 vIffPr3mbvmTgRtFHp4eofGPkny8qhI= X-Rspamd-Queue-Id: 0469040175 X-Rspam-User: X-Rspamd-Server: rspam11 Authentication-Results: imf01.hostedemail.com; dkim=none ("invalid DKIM record") header.d=intel.com header.s=Intel header.b=FIp8VYbn; spf=pass (imf01.hostedemail.com: domain of ying.huang@intel.com designates 192.55.52.136 as permitted sender) smtp.mailfrom=ying.huang@intel.com; dmarc=pass (policy=none) header.from=intel.com X-Stat-Signature: 5nuy4mix9yqxkz951eox3sy4fhn6zc55 X-HE-Tag: 1660010334-651321 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: "Aneesh Kumar K.V" writes: > In the current kernel, memory tiers are defined implicitly via a demotion path > relationship between NUMA nodes, which is created during the kernel > initialization and updated when a NUMA node is hot-added or hot-removed. The > current implementation puts all nodes with CPU into the highest tier, and builds > the tier hierarchy by establishing the per-node demotion targets based on the > distances between nodes. > > This current memory tier kernel implementation needs to be improved for several > important use cases, > > The current tier initialization code always initializes each memory-only NUMA > node into a lower tier. But a memory-only NUMA node may have a high performance > memory device (e.g. a DRAM-backed memory-only node on a virtual machine) that > should be put into a higher tier. > > The current tier hierarchy always puts CPU nodes into the top tier. But on a > system with HBM or GPU devices, the memory-only NUMA nodes mapping these devices > should be in the top tier, and DRAM nodes with CPUs are better to be placed into > the next lower tier. > > With current kernel higher tier node can only be demoted to nodes with shortest > distance on the next lower tier as defined by the demotion path, not any other > node from any lower tier. This strict, demotion order does not work in all use > cases (e.g. some use cases may want to allow cross-socket demotion to another > node in the same demotion tier as a fallback when the preferred demotion node is > out of space), This demotion order is also inconsistent with the page allocation > fallback order when all the nodes in a higher tier are out of space: The page > allocation can fall back to any node from any lower tier, whereas the demotion > order doesn't allow that. > > This patch series address the above by defining memory tiers explicitly. > > Linux kernel presents memory devices as NUMA nodes and each memory device is of > a specific type. The memory type of a device is represented by its abstract > distance. A memory tier corresponds to a range of abstract distance. This allows > for classifying memory devices with a specific performance range into a memory > tier. > > This patch configures the range/chunk size to be 128. The default DRAM abstract > distance is 512. We can have 4 memory tiers below the default DRAM with abstract > distance range 0 - 127, 127 - 255, 256- 383, 384 - 511. Faster memory devices > can be placed in these faster(higher) memory tiers. Slower memory devices like > persistent memory will have abstract distance higher than the default DRAM > level. > > Signed-off-by: Aneesh Kumar K.V > --- > include/linux/memory-tiers.h | 15 +++++ > mm/Makefile | 1 + > mm/memory-tiers.c | 107 +++++++++++++++++++++++++++++++++++ > 3 files changed, 123 insertions(+) > create mode 100644 include/linux/memory-tiers.h > create mode 100644 mm/memory-tiers.c > > diff --git a/include/linux/memory-tiers.h b/include/linux/memory-tiers.h > new file mode 100644 > index 000000000000..bc7c1b799bef > --- /dev/null > +++ b/include/linux/memory-tiers.h > @@ -0,0 +1,15 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _LINUX_MEMORY_TIERS_H > +#define _LINUX_MEMORY_TIERS_H > + > +/* > + * Each tier cover a abstrace distance chunk size of 128 > + */ > +#define MEMTIER_CHUNK_BITS 7 > +#define MEMTIER_CHUNK_SIZE (1 << MEMTIER_CHUNK_BITS) > +/* > + * Smaller abstract distance value imply faster(higher) memory tiers. > + */ > +#define MEMTIER_ADISTANCE_DRAM (4 * MEMTIER_CHUNK_SIZE) > + > +#endif /* _LINUX_MEMORY_TIERS_H */ > diff --git a/mm/Makefile b/mm/Makefile > index 6f9ffa968a1a..d30acebc2164 100644 > --- a/mm/Makefile > +++ b/mm/Makefile > @@ -92,6 +92,7 @@ obj-$(CONFIG_KFENCE) += kfence/ > obj-$(CONFIG_FAILSLAB) += failslab.o > obj-$(CONFIG_MEMTEST) += memtest.o > obj-$(CONFIG_MIGRATION) += migrate.o > +obj-$(CONFIG_NUMA) += memory-tiers.o > obj-$(CONFIG_DEVICE_MIGRATION) += migrate_device.o > obj-$(CONFIG_TRANSPARENT_HUGEPAGE) += huge_memory.o khugepaged.o > obj-$(CONFIG_PAGE_COUNTER) += page_counter.o > diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c > new file mode 100644 > index 000000000000..78b311d9bde9 > --- /dev/null > +++ b/mm/memory-tiers.c > @@ -0,0 +1,107 @@ > +// SPDX-License-Identifier: GPL-2.0 > +#include > +#include > +#include > +#include > +#include > + > +struct memory_tier { > + /* hierarchy of memory tiers */ > + struct list_head list; > + /* list of all memory types part of this tier */ > + struct list_head memory_types; > + /* > + * start value of abstract distance. memory tier maps > + * an abstract distance range, > + * adistance_start .. adistance_start + MEMTIER_CHUNK_SIZE > + */ > + int adistance_start; > +}; > + > +struct memory_dev_type { > + /* list of memory types that are part of same tier as this type */ > + struct list_head tier_sibiling; > + /* abstract distance for this specific memory type */ > + int adistance; > + /* Nodes of same abstract distance */ > + nodemask_t nodes; > + struct memory_tier *memtier; > +}; > + > +static DEFINE_MUTEX(memory_tier_lock); > +static LIST_HEAD(memory_tiers); > +static struct memory_dev_type *node_memory_types[MAX_NUMNODES]; > +/* > + * For now let's have 4 memory tier below default DRAM tier. > + */ > +static struct memory_dev_type default_dram_type = { > + .adistance = MEMTIER_ADISTANCE_DRAM, > + .tier_sibiling = LIST_HEAD_INIT(default_dram_type.tier_sibiling), > +}; > + > +static struct memory_tier *find_create_memory_tier(struct memory_dev_type *memtype) > +{ > + bool found_slot = false; > + struct memory_tier *memtier, *new_memtier; > + int adistance = memtype->adistance; > + unsigned int memtier_adistance_chunk_size = MEMTIER_CHUNK_SIZE; > + > + lockdep_assert_held_once(&memory_tier_lock); > + > + /* > + * If the memtype is already part of a memory tier, > + * just return that. > + */ > + if (memtype->memtier) > + return memtype->memtier; > + > + adistance = round_down(adistance, memtier_adistance_chunk_size); > + list_for_each_entry(memtier, &memory_tiers, list) { > + if (adistance == memtier->adistance_start) { > + memtype->memtier = memtier; > + list_add(&memtype->tier_sibiling, &memtier->memory_types); > + return memtier; > + } else if (adistance < memtier->adistance_start) { > + found_slot = true; > + break; > + } > + } > + > + new_memtier = kmalloc(sizeof(struct memory_tier), GFP_KERNEL); > + if (!new_memtier) > + return ERR_PTR(-ENOMEM); > + > + new_memtier->adistance_start = adistance; > + INIT_LIST_HEAD(&new_memtier->list); > + INIT_LIST_HEAD(&new_memtier->memory_types); > + if (found_slot) > + list_add_tail(&new_memtier->list, &memtier->list); > + else > + list_add_tail(&new_memtier->list, &memory_tiers); > + memtype->memtier = new_memtier; > + list_add(&memtype->tier_sibiling, &new_memtier->memory_types); > + return new_memtier; > +} > + > +static int __init memory_tier_init(void) > +{ > + int node; > + struct memory_tier *memtier; > + > + mutex_lock(&memory_tier_lock); > + /* CPU only nodes are not part of memory tiers. */ > + default_dram_type.nodes = node_states[N_MEMORY]; > + > + memtier = find_create_memory_tier(&default_dram_type); > + if (IS_ERR(memtier)) > + panic("%s() failed to register memory tier: %ld\n", > + __func__, PTR_ERR(memtier)); > + > + for_each_node_state(node, N_MEMORY) > + node_memory_types[node] = &default_dram_type; Although not absolutely necessary, it seems better to set node_memory_types[] before adding nodes to the memory type and adding the memory type to the memory tier. Best Regards, Huang, Ying > + > + mutex_unlock(&memory_tier_lock); > + > + return 0; > +} > +subsys_initcall(memory_tier_init);