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bh=J6QGR+R9nb0MwoXrY/wVlgZDi2AoSc1og9Jf61EJyDc=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=YVPYT6UHU0h3BbC7xXT3xJzABOj9G5nhlyVQ96KFJ6bCDcF+a0srZJb7Egs0sxAQf o9IrjNXTV6kNdB9CcZddF4aNPVGZP3gkBSs1zmS1yWBVzDCqAnv2Y+1KlGn0R+Ps88 RorQaM2o2TMrWa93tO3Ahwoh7ol3IvMAW1taijxPc2tps0W0Eyz8m/xWiqe4MsY2uC jN7aQSIRMz1ENygz/CLpJzSK9llKsaiLK48NAwY7v9fmhTpl+BELcfYKD6U+EFgIGx ogJgLpod1Mhgb8GxEEYcM0D7M0yLakjf5TDyzfuk2Hd7GUo+Xt472eQLaLeCPNvvjb /7AkIvUWlWlQA== From: =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= To: David Hildenbrand , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, Anshuman Khandual Cc: =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= , linux-kernel@vger.kernel.org, linux-mm@kvack.org, Oscar Salvador , virtualization@lists.linux-foundation.org, linux@rivosinc.com, Alexandre Ghiti Subject: Re: [PATCH 0/7] riscv: Memory Hot(Un)Plug support In-Reply-To: <87zg62eqm4.fsf@all.your.base.are.belong.to.us> References: <20230512145737.985671-1-bjorn@kernel.org> <9aa7d030-19b5-01df-70c0-86d8d6ab86a6@redhat.com> <87zg62eqm4.fsf@all.your.base.are.belong.to.us> Date: Sun, 21 May 2023 11:15:29 +0200 Message-ID: <87lehikpu6.fsf@all.your.base.are.belong.to.us> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Rspamd-Queue-Id: 1D9D4140009 X-Rspam-User: X-Rspamd-Server: rspam02 X-Stat-Signature: 8y3dd64ogpg7gih7kj7a9at6mo8zeeo7 X-HE-Tag: 1684660533-309977 X-HE-Meta: U2FsdGVkX19zPT/6ImvrCse/Mfu90A+fJruRPiSF3KE5f+60/BMrrmMUKypYkm5/F7foxtGVApZX86g5d62UX6zXwv5J/UX715su+FHHwL6bNjhHzseLB6dJQgtWuQPO8gtjhxUudP2JYcuziqijFzpHYytwR+os9l0Oogfwo+jDzEmId69jGhbq7f4tE/+1wlx+gOWdXoIftJgQTCePhbb4rrLw2FEwXIBmSeBjHgdUiRoJZv3dZSPiVstdMAwoU00I33yNwDoo1tRW/Rct9NM649/hYZRSHrF06sRKIvl7xBByFECyw14cqTm/G6TXltIkkdZeToMEjp2rNOBKBankfV4xhf17eGUpM5M0aiv3nIbDcck2RbStHNGYAkd1lPoidSHewSmocF4XGvXP6hB26rxVioBzPXpxO8xZ9qtd4hCEV4a3iLiTwMDfMTJrUy4ZZ+eIYxmz7lx6PpFQEqzulmo23mHlfSRf5GtTrifVX8yMj6tD1VOZqHxwDGN84lyAH8HEBbZq8hlN0aaNm4/vNu+zVPfNS0ZyxYASzUh6JUL4ZXN+LVBFr56w8xwiVqJeL9HFOVtmdFrfuEWYlFuPS2RGwcw2aN6dsROaPG9ifrAgM/IX3+CwHfSgmjIxTRkU0FtIh/wlqN1WB+f0fDFfjYOhutpbAcU8lkuzCWe8barN6YgZo+2EJlDs9G6MqFuC/ZFwCkD4fpKSIa+pcil3SqYMrQcBg6DfQ1QV7n7vI4SjxlTjWaQUHXCp4H5BeDID2DHgzSL0BQRCdFeKCfWxp5ZF7C8A1IFkRdCH+Nu8bvIl0VCA27MKqDuON9dt1Bw1+GFoX7xY2PruaEszyi4D2rcDzsiRHDJWbNCcC56tIG4UC+NEUAGbD7iH4+JpjUQuEHoumg7jXggDYGcR4KMwVSyHgSyCEGYjNobOI89WbJaRoi9Bz2nRA2f4teMjtmf/oEfrw69KtykoCYm A3wwNE2C 2mmP7fyt9vIYZmsuTo8Z7RyxMPr2EATQ1zOf+SiJi5pqrPt67YNcTQzkgnWwCPnvI/Co/3+Y4XHV1YQJetFQljp0NAnNAAY54++R883WYm6M2vKBgVk1wHYgXwG3g++n/At0sutPskucn/7xKHIc+H1dW6eP5NX5F/9dQE7rDF4sF8HtmGz59QJJvuXRu1MPnQ2jQyeLP+xZg1p9s7mwm13r3G+hyNW7FhgzVNQHIfGgxt6Eh4SubLA/FmDpW5/ODqDZ+IL3UChHg/QXx8eoCKoDirS0poT7wP1qZ7Er/rN6LJalvhuo3W3Qyd8hcZIOFpdym0tuxAAEoHi2/HqtTsowo5ykzTVN9D3hzbK9c8K54siHH/XyFJm+Fq3RDPZGS5eeZoGyF/8dhS5mjmrEuLEYVrgK4VwNOrzoxkBoELsFmH2EUrKAPITgsqLSkY1OS/+It6HBD8HTXiG1nGko6YY04eHkvpK0jYCKgv/OqVMPtWrU= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Hi David and Anshuman! Bj=C3=B6rn T=C3=B6pel writes: > David Hildenbrand writes: > >> On 12.05.23 16:57, Bj=C3=B6rn T=C3=B6pel wrote: >>> From: Bj=C3=B6rn T=C3=B6pel >>>=20 >>> Memory Hot(Un)Plug support for the RISC-V port >>> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > [...] > >> >> Cool stuff! I'm fairly busy right now, so some high-level questions upfr= ont: > > No worries, and no rush! I'd say the v1 series was mainly for the RISC-V > folks, and I've got tons of (offline) comments from Alex -- and with > your comments below some more details to figure out. One of the major issues with my v1 patch is around init_mm page table synchronization, and that'll be part of the v2. I've noticed there's a quite a difference between x86-64 and arm64 in terms of locking, when updating (add/remove) the init_mm table. x86-64 uses the usual page table locking mechanisms (used by the generic kernel functions), whereas arm64 does not. How does arm64 manage to mix the "lock-less" updates (READ/WRITE_ONCE, and fences in set_p?d+friends), with the generic kernel ones that uses the regular page locking mechanism? I'm obviously missing something about the locking rules for memory hot add/remove... I've been reading the arm64 memory hot add/remove series, but none the wiser! ;-) Bj=C3=B6rn