From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E59FDC433B4 for ; Tue, 20 Apr 2021 03:47:55 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 5FD2E613B4 for ; Tue, 20 Apr 2021 03:47:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5FD2E613B4 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ellerman.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id 85BD96B0036; Mon, 19 Apr 2021 23:47:54 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 80A5B6B006E; Mon, 19 Apr 2021 23:47:54 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 683F66B0070; Mon, 19 Apr 2021 23:47:54 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0028.hostedemail.com [216.40.44.28]) by kanga.kvack.org (Postfix) with ESMTP id 4CA186B0036 for ; Mon, 19 Apr 2021 23:47:54 -0400 (EDT) Received: from smtpin12.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay05.hostedemail.com (Postfix) with ESMTP id EC0E8181AEF32 for ; Tue, 20 Apr 2021 03:47:53 +0000 (UTC) X-FDA: 78051361626.12.221C384 Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) by imf09.hostedemail.com (Postfix) with ESMTP id DF8EA6000113 for ; Tue, 20 Apr 2021 03:47:48 +0000 (UTC) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4FPV5300Qtz9vDk; Tue, 20 Apr 2021 13:47:50 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ellerman.id.au; s=201909; t=1618890471; bh=dzX0AONR3rVVRmA3Bml1sXuJR87hajtjlzDDZwg+F/4=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=ifDcvMtLMoFGMG44uawsaQegbQSLx4J2mkoxK2SCLaTbftjGO7IeYPOQKI/c3YRPA otiUG9asxlb/iRdLYO+oBJTSmbMqgKuz0csFWdUQCwz8c33q2anATHhB9jJUwlh4q8 SOPnsf9aWFZfk04ccVw+rmnt+GRBjgTJOUDWi9dIfyxLZtCVW0809IpUdcdmrXcdgU c2pXjHkmwmfpi7mpZm2g8cWyZOjaZPZZsdaSi60BduQ2KoDv5j8DlfNNDj/d0JYXIa R33GkVsqFzdzID3G4HNDADD/98Ey9fIymKU9BsSvNmgY8g3JE1bF3l6E7ZoFkSPC3t NiK5vle4RW1IA== From: Michael Ellerman To: "Aneesh Kumar K.V" , linux-mm@kvack.org, akpm@linux-foundation.org Cc: linuxppc-dev@lists.ozlabs.org, kaleshsingh@google.com, npiggin@gmail.com, joel@joelfernandes.org, "Aneesh Kumar K.V" Subject: Re: [PATCH v4 6/9] mm/mremap: Use range flush that does TLB and page walk cache flush In-Reply-To: <20210414085915.301189-7-aneesh.kumar@linux.ibm.com> References: <20210414085915.301189-1-aneesh.kumar@linux.ibm.com> <20210414085915.301189-7-aneesh.kumar@linux.ibm.com> Date: Tue, 20 Apr 2021 13:47:50 +1000 Message-ID: <87fszld3bt.fsf@mpe.ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain X-Rspamd-Server: rspam05 X-Rspamd-Queue-Id: DF8EA6000113 X-Stat-Signature: ywc8kubpbpmgrmztghsptjuo4dmqbwce Received-SPF: none (ellerman.id.au>: No applicable sender policy available) receiver=imf09; identity=mailfrom; envelope-from=""; helo=ozlabs.org; client-ip=203.11.71.1 X-HE-DKIM-Result: pass/pass X-HE-Tag: 1618890468-819743 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: "Aneesh Kumar K.V" writes: > Some architectures do have the concept of page walk cache which need > to be flush when updating higher levels of page tables. A fast mremap > that involves moving page table pages instead of copying pte entries > should flush page walk cache since the old translation cache is no more > valid. > > Add new helper flush_pte_tlb_pwc_range() which invalidates both TLB and > page walk cache where TLB entries are mapped with page size PAGE_SIZE. > > Signed-off-by: Aneesh Kumar K.V > --- > arch/powerpc/include/asm/book3s/64/tlbflush.h | 11 +++++++++++ > mm/mremap.c | 15 +++++++++++++-- > 2 files changed, 24 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h > index f9f8a3a264f7..c236b66f490b 100644 > --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h > +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h > @@ -80,6 +80,17 @@ static inline void flush_hugetlb_tlb_range(struct vm_area_struct *vma, > return flush_hugetlb_tlb_pwc_range(vma, start, end, false); > } > > +#define flush_pte_tlb_pwc_range flush_tlb_pwc_range > +static inline void flush_pte_tlb_pwc_range(struct vm_area_struct *vma, > + unsigned long start, unsigned long end, > + bool also_pwc) This still uses the also_pwc name, which is a bit inconsistent with the previous patch. But, does it even need to be a parameter? AFAICS you always pass true, and pwc=true is sort of implied by the name isn't it? cheers > +{ > + if (radix_enabled()) > + return radix__flush_tlb_pwc_range_psize(vma->vm_mm, start, > + end, mmu_virtual_psize, also_pwc); > + return hash__flush_tlb_range(vma, start, end); > +} > + > static inline void flush_tlb_range(struct vm_area_struct *vma, > unsigned long start, unsigned long end) > { > diff --git a/mm/mremap.c b/mm/mremap.c > index 574287f9bb39..0e7b11daafee 100644 > --- a/mm/mremap.c > +++ b/mm/mremap.c > @@ -210,6 +210,17 @@ static void move_ptes(struct vm_area_struct *vma, pmd_t *old_pmd, > drop_rmap_locks(vma); > } > > +#ifndef flush_pte_tlb_pwc_range > +#define flush_pte_tlb_pwc_range flush_pte_tlb_pwc_range > +static inline void flush_pte_tlb_pwc_range(struct vm_area_struct *vma, > + unsigned long start, > + unsigned long end, > + bool also_pwc) > +{ > + return flush_tlb_range(vma, start, end); > +} > +#endif > + > #ifdef CONFIG_HAVE_MOVE_PMD > static bool move_normal_pmd(struct vm_area_struct *vma, unsigned long old_addr, > unsigned long new_addr, pmd_t *old_pmd, pmd_t *new_pmd) > @@ -260,7 +271,7 @@ static bool move_normal_pmd(struct vm_area_struct *vma, unsigned long old_addr, > VM_BUG_ON(!pmd_none(*new_pmd)); > pmd_populate(mm, new_pmd, (pgtable_t)pmd_page_vaddr(pmd)); > > - flush_tlb_range(vma, old_addr, old_addr + PMD_SIZE); > + flush_pte_tlb_pwc_range(vma, old_addr, old_addr + PMD_SIZE, true); > if (new_ptl != old_ptl) > spin_unlock(new_ptl); > spin_unlock(old_ptl); > @@ -307,7 +318,7 @@ static bool move_normal_pud(struct vm_area_struct *vma, unsigned long old_addr, > VM_BUG_ON(!pud_none(*new_pud)); > > pud_populate(mm, new_pud, (pmd_t *)pud_page_vaddr(pud)); > - flush_tlb_range(vma, old_addr, old_addr + PUD_SIZE); > + flush_pte_tlb_pwc_range(vma, old_addr, old_addr + PUD_SIZE, true); > if (new_ptl != old_ptl) > spin_unlock(new_ptl); > spin_unlock(old_ptl); > -- > 2.30.2