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b=VzBHDakF5oapgbqSwyCXW4NlOxuhWIXgHT5bnjksmwxnwzB2j77QlwtNy9auFKO5k R5zuzvTLv5v6JR0g4zAQSDALbGO0+HtyCcaxIv+XCmtUOUNdsZXpr/60HJ8m0se9Ac HCqPfRmHl1K9cRm2zGL0JLt1dLbvDoohuA4JmvWcFN0J1XTPyIZXfr0n3q8zPBgbwM 2KTETWI8PkOX6ZP5se3LmuOaFIoUbfwmRFq7s/gffXRM+ntl6Tsz8s7uIuoBncovYH 169scsrJUZSYlGwI60JQl2lk38JbvV/eRPo8tLjsBgWQeltv5kZiHwGm5Gqurl9z/4 hTaeq+aYRbc4A== From: Michael Ellerman To: David Hildenbrand , linux-kernel@vger.kernel.org Cc: Andrew Morton , Hugh Dickins , John Hubbard , Jason Gunthorpe , Mike Rapoport , Yang Shi , Vlastimil Babka , Nadav Amit , Andrea Arcangeli , Peter Xu , linux-mm@kvack.org, x86@kernel.org, linux-alpha@vger.kernel.org, linux-snps-arc@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-csky@vger.kernel.org, linux-hexagon@vger.kernel.org, linux-ia64@vger.kernel.org, loongarch@lists.linux.dev, linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, openrisc@lists.librecores.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, linux-um@lists.infradead.org, linux-xtensa@linux-xtensa.org, David Hildenbrand , Nicholas Piggin , Christophe Leroy Subject: Re: [PATCH mm-unstable v1 17/26] powerpc/mm: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE on 32bit book3s In-Reply-To: <20230113171026.582290-18-david@redhat.com> References: <20230113171026.582290-1-david@redhat.com> <20230113171026.582290-18-david@redhat.com> Date: Fri, 10 Feb 2023 16:08:07 +1100 Message-ID: <87cz6iw1jc.fsf@mpe.ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain X-Rspam-User: X-Rspamd-Server: rspam02 X-Rspamd-Queue-Id: 3E09D4000A X-Stat-Signature: iddkxy6hy8zgcgnwce9b1i6zpuehogq7 X-HE-Tag: 1676005698-554030 X-HE-Meta: U2FsdGVkX19SGdsWsSVUYUfyTgw1WpFLYNArMHZg8scoQNyB7gVu+OLTd3EYI9u/0IZ4nWpTmZfKU7JnvRmoNGjMVxn8xfHvU73oZLwesRe4OrBodyqL/HnMMc+1KJaU39liiyfbTkNCN6lslqyxFXEOfrypPankLIZOdHGCV6K1CZ2VqmFQDEVZu4ERmhdRKyXCo6uimmpRISN08WqN3wZYG6CVRTl0OnsfY4nLapL4yeumHJKxekmFWF+pq8Y1UI1edWty99l8Yr/2ZtkiPHoTjd0jVNmMHpTVXGupH1n3wGEkdrqOrn6VSvj5TQp014JA+u6e356euXUteGpzoJ7k1eFeHxB9JyxYwOvV5Kc0ny/l8DyNHa8PLBAXR9HxsI5YjrmPJLI25A47INU6kl28nAKUOk6sCSLK+77eX18RSZZan1IJhoPAzi2HL9oafqaTnmBmtALK/VVWkdYowhXZRS2KBI35+BPJN09s9ENxprMj4xRy7DdXvKzcvRI1eyYZB8GhvcgzMN0xY8RIfVndtRzIgJgbfMGjbREFfcP4czFuEqPikapJLlgqrInjW2jyJUiwRW7c+VUGMBhrwQODiBTTC8itK9EO99O96jYVi6PaMzimWp5RfbHkMlJl0FsUPDCFCHjJqOdzA00R1PGeOzeTWIGwUm6g9Ywj2ueJB2ky1LWTj/GW7u1YCKpBzVKM6e+fMVb2EWMmG31+8cmJ4y0OnWcAE7gV+Yr5/W1DAB8riWvDtDnqShG/bTP7Vkts/Hrjsq94BrjQB0Tl8FvxBSvY52Ywg9NT7PFVUYbP7LzmQnuPtlwEvtu0zRKj7sT2y4hGKWKirEy2X6S2IKl4t4PwuC7nzmNVMWA2rCdE7DmnxIiVvysSYqoiecbfOXyRe+HUf1k+fVzahsfRwFJJRoOlHPWGclSbHqpptZnLg0ausEthOwKW+95G4iiMrceEmfGqhwk/2aPd89C IOOU2vFY 53NwK4O9wt4eopgP5lz5WSafqcl2r/hpVpF5f6E7oiJIDICmspDTQN4GrL+BbbLKiFysgeTSIkBQXStMbIm3/buJTNAp15q5ZMLUvZcx4DqCn6OnNxs1Uc9PM5YJtxGhroYBiLIJS6IoHtlponYnXSi5GDw1GaD0gjL7/EUq9ahi8izVbgPOfaOrybB8loVBHc4yhJw+518xztURRw3b0uw1AQQsxS3UdVy9fUEs/jckIWcpQRdDSmiUcRiiPIBmwrn4rE5tWxvBvr7lCHgg4L/4kWYHkSjtthELmWpB3uArPpvLeJPS4vszVHJshfklLcBTaR5B03735DGaplC/1Kc/TYSNxd6v/mfvmDpKL213MD+xYEZ/TCGN+53lnEHGCF7w+AOEXtF8vw2vLLOE6ceM99g== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: David Hildenbrand writes: > We already implemented support for 64bit book3s in commit bff9beaa2e80 > ("powerpc/pgtable: support __HAVE_ARCH_PTE_SWP_EXCLUSIVE for book3s") > > Let's support __HAVE_ARCH_PTE_SWP_EXCLUSIVE also in 32bit by reusing yet > unused LSB 2 / MSB 29. There seems to be no real reason why that bit cannot > be used, and reusing it avoids having to steal one bit from the swap > offset. > > While at it, mask the type in __swp_entry(). > > Cc: Michael Ellerman > Cc: Nicholas Piggin > Cc: Christophe Leroy > Signed-off-by: David Hildenbrand > --- > arch/powerpc/include/asm/book3s/32/pgtable.h | 38 +++++++++++++++++--- > 1 file changed, 33 insertions(+), 5 deletions(-) I gave this a quick test on a ppc32 machine, everything seems fine. Your test_swp_exclusive.c passes, and an LTP run looks normal. Acked-by: Michael Ellerman (powerpc) cheers > diff --git a/arch/powerpc/include/asm/book3s/32/pgtable.h b/arch/powerpc/include/asm/book3s/32/pgtable.h > index 75823f39e042..0ecb3a58f23f 100644 > --- a/arch/powerpc/include/asm/book3s/32/pgtable.h > +++ b/arch/powerpc/include/asm/book3s/32/pgtable.h > @@ -42,6 +42,9 @@ > #define _PMD_PRESENT_MASK (PAGE_MASK) > #define _PMD_BAD (~PAGE_MASK) > > +/* We borrow the _PAGE_USER bit to store the exclusive marker in swap PTEs. */ > +#define _PAGE_SWP_EXCLUSIVE _PAGE_USER > + > /* And here we include common definitions */ > > #define _PAGE_KERNEL_RO 0 > @@ -363,17 +366,42 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma, > #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) > > /* > - * Encode and decode a swap entry. > - * Note that the bits we use in a PTE for representing a swap entry > - * must not include the _PAGE_PRESENT bit or the _PAGE_HASHPTE bit (if used). > - * -- paulus > + * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that > + * are !pte_none() && !pte_present(). > + * > + * Format of swap PTEs (32bit PTEs): > + * > + * 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 > + * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 > + * <----------------- offset --------------------> < type -> E H P > + * > + * E is the exclusive marker that is not stored in swap entries. > + * _PAGE_PRESENT (P) and __PAGE_HASHPTE (H) must be 0. > + * > + * For 64bit PTEs, the offset is extended by 32bit. > */ > #define __swp_type(entry) ((entry).val & 0x1f) > #define __swp_offset(entry) ((entry).val >> 5) > -#define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 5) }) > +#define __swp_entry(type, offset) ((swp_entry_t) { ((type) & 0x1f) | ((offset) << 5) }) > #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 3 }) > #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 3 }) > > +#define __HAVE_ARCH_PTE_SWP_EXCLUSIVE > +static inline int pte_swp_exclusive(pte_t pte) > +{ > + return pte_val(pte) & _PAGE_SWP_EXCLUSIVE; > +} > + > +static inline pte_t pte_swp_mkexclusive(pte_t pte) > +{ > + return __pte(pte_val(pte) | _PAGE_SWP_EXCLUSIVE); > +} > + > +static inline pte_t pte_swp_clear_exclusive(pte_t pte) > +{ > + return __pte(pte_val(pte) & ~_PAGE_SWP_EXCLUSIVE); > +} > + > /* Generic accessors to PTE bits */ > static inline int pte_write(pte_t pte) { return !!(pte_val(pte) & _PAGE_RW);} > static inline int pte_read(pte_t pte) { return 1; } > -- > 2.39.0 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv