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X-CSE-ConnectionGUID: 9Q0agbC3SFi86sco+ubG0w== X-CSE-MsgGUID: umtDoQX1SIyfE9V24kK5+g== X-IronPort-AV: E=McAfee;i="6700,10204,11149"; a="37784026" X-IronPort-AV: E=Sophos;i="6.09,250,1716274800"; d="scan'208";a="37784026" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jul 2024 00:24:12 -0700 X-CSE-ConnectionGUID: CV578NcQS3GWlq23JdJ6+Q== X-CSE-MsgGUID: 8jrySnJVSk2QjPs9EjQBHQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,250,1716274800"; d="scan'208";a="54594416" Received: from yhuang6-desk2.sh.intel.com (HELO yhuang6-desk2.ccr.corp.intel.com) ([10.238.208.55]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jul 2024 00:24:10 -0700 From: "Huang, Ying" To: Gregory Price Cc: linux-mm@kvack.org, akpm@linux-foundation.org, dave.jiang@intel.com, Jonathan.Cameron@huawei.com, horenchuang@bytedance.com, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, dan.j.williams@intel.com, lenb@kernel.org, "Aneesh Kumar K.V" Subject: Re: [PATCH] acpi/hmat,mm/memtier: always register hmat adist calculation callback In-Reply-To: (Gregory Price's message of "Tue, 30 Jul 2024 15:58:10 -0400") References: <20240726215548.10653-1-gourry@gourry.net> <87ttg91046.fsf@yhuang6-desk2.ccr.corp.intel.com> <877cd3u1go.fsf@yhuang6-desk2.ccr.corp.intel.com> <87cymupd7r.fsf@yhuang6-desk2.ccr.corp.intel.com> Date: Wed, 31 Jul 2024 15:20:37 +0800 Message-ID: <878qxiowmy.fsf@yhuang6-desk2.ccr.corp.intel.com> User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 Content-Type: text/plain; charset=ascii X-Rspamd-Server: rspam07 X-Rspamd-Queue-Id: 8AE82100017 X-Stat-Signature: dqiab64pkafgs9p7mydx6yuhgf6fy4i7 X-Rspam-User: X-HE-Tag: 1722410653-425560 X-HE-Meta: U2FsdGVkX18LE7W0C9UEmSbfRX8NzYSVy4WPKLuitKU3XC9AKT3I1ivt5LWgKoBko3lZefUW9Z0Fxl6Y5IbvNSrWSxZqdBmm7rrVezRCGne/sr6JmIoorbRueA5bolyKjsX+vo+F1ecpZ2qjPDk61bnUcEGen7CzAxlM0EXCnfflS8MuVAoLf/8VjND17oVmzZoYwNmMjKfJ+AJ57YRGVb0iZASmN/JQG1jMQtNSQsZfRphm3v+gWn+DNSZEg+e3+EAHUajc6I7CE0bpDR/jFn66jBdMnGdtGxCyySbdlAA3epZ22//2P76HYtec0SwNd+DxhGHoswddIz6oGob/HU6a+zkWMz+nomd0+x/+2eghtilJDEcjsFIIfFENVekunpkkZk/pwwCGd7dXtNlkzgVwzCnOJ0PCm3tPysn28PyqgggH6XI6PLXDSvj+iQ2OmpUDGVDlf7TuoFcaP0CsCdoe24mhQ8y7IcKLydNSy9idzJsr0QVpzUl4C+7qnoVORo3TA6fhZm04dP+hSrOg02yxbZWO1zdXWhNOnUcowNmO5XU+PW9jpTof2h6BhKhYwUFvgKXo3PTzxdhdTnMfY2e8ntT3R/Df/uLN6RZgBB0Gae0jZRX/Pq5Eu3tNaOFPyPvcF07kOe1Z0KBE3LHjnSCZ9CBgyjOwBiP3kFXs+dXD8oRB0OcZl5wzrfqBITr2wH1Wjg7LQTXdRDtVejgt6TCt7ywcKbkub/M6Ls0JNntlWRgFeOxRWUsHYMyCkpQv02NiepQgtrp2UiC8itOnXZeunmaBdGc3fxgGT2MzAp/+52Qoq3vNgDAh3zAkjRQymejKnc/ip0kurRftWw6GmMjlDltnO0L40B0nhN+43G95HoEhbf3UZRua9tN7b7mmfE2O/224dgqPNZoNEHcHH7kt7Ec4vY/hy4y7SX2s3jowX0c87YEhSiSunQHB4qpbl/DJMf/2JLDz+r5AB9l yLTDTc+a ZDVQj3hI6d3wydRk7YobYTWISo70635dJ2tmGR4MnrCkCFrmCQT9yCyWxKsZlj8sA7lPq65Ot0mAqhnCmAZgCWg7+NzKURbo48X6GEk+tOWKJrtG5ebqHL58NXM7mKoEtLKKKFXVrsoPVBE57bis8iWMjgek02bRZ6Z8hMTSw+sNqMPFnMyZoney2ifFEUenXaEeizQToUNeWl1g= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Gregory Price writes: > On Wed, Jul 31, 2024 at 09:22:32AM +0800, Huang, Ying wrote: >> Gregory Price writes: >> >> > This presumes driver configured devices, which is not always the case. >> > >> > kmem.c will set MEMTIER_DEFAULT_DAX_ADISTANCE >> > >> > but if BIOS/EFI has set up the node instead, you get the default of >> > MEMTIER_ADISTANCE_DRAM if HMAT is not present or otherwise not sane. >> >> "efi_fake_mem=" kernel parameter can be used to add "EFI_MEMORY_SP" flag >> to the memory range, so that kmem.c can manage it. >> > > In this case, the system is configured explicitly so that kmem does not > manage it. In fact, some systems still cannot be managed with > EFI_MEMORY_SP due to hpa!=spa issues that the driver cannot manage. Sorry, I don't understand. IIUC, kmem.c can manage almost any memory range via drivers/dax/hmem. Please check drivers/dax/hmem/device.c drivers/dax/hmem/hmem.c Could you elaborate why kmem.c doesn't work for some memory range? >> > Not everyone is going to have the ability to get a platform vendor to >> > fix a BIOS bug, and I've seen this in production. >> >> So, some vendor build a machine with broken/missing HMAT/CDAT and wants >> users to use CXL memory devices in it? Have the vendor tested whether >> CXL memory devices work? >> > > As I mentioned, the broken aspect is being fixed, however there are > existing production hardware which do not have HMAT entries. > >> > But the first step here would be creating two modes. HMAT-is-sane and >> > CPU/Non-CPU seems reasonable to me but open to opinions. >> >> IMHO, we should reduce user configurable knobs unless we can prove it >> is really necessary. >> > > That's fair and valid. > > But I think a feature that worked in 5.x should work in 6.x, and right > now the change in node placement breaks hardware that worked with 5.x > which happened to have broken or missing HMAT. -- Best Regards, Huang, Ying