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Mon, 7 Apr 2025 07:45:48 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id gu7EGKyC82dnHgAAD6G6ig (envelope-from ); Mon, 07 Apr 2025 07:45:48 +0000 Message-ID: <87045708-5786-45d0-8ec7-919f7a511f71@suse.cz> Date: Mon, 7 Apr 2025 09:45:48 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: slub - extended kmalloc redzone and dma alignment To: Petr Tesarik Cc: Harry Yoo , Feng Tang , Peng Fan , Hyeonggon Yoo <42.hyeyoo@gmail.com>, David Rientjes , Christoph Lameter , "linux-mm@kvack.org" , Catalin Marinas References: <20250404131239.2a987e58@mordecai> <20250404155303.2e0cdd27@mordecai> Content-Language: en-US From: Vlastimil Babka In-Reply-To: <20250404155303.2e0cdd27@mordecai> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Rspamd-Action: no action X-Rspamd-Server: rspam04 X-Rspamd-Queue-Id: 633B3140009 X-Stat-Signature: ayqq7mc1bjxh7hxfnpwpqq897or9we7f X-Rspam-User: X-HE-Tag: 1744011950-996717 X-HE-Meta: U2FsdGVkX1+sVeck/mNTwkfCq+DcYfSkuZpwO0DMgRViuKInxbJWCCBzFIQouuXRhf49c12fObgFOhcA4s1wscWVZrTrrEJp4JT/P98Yq3ryueuqxjAZaf6AUDhw2/K2daOJLHgHZunoq5mQbQQWRuC3fNPvsMtCdOKbqx+7+9SjMOMw/p+TT0whVfNAqiEA4wqXqxS5E9RHWbGVshYoa3g/JewH4FJAjkXbqKz6NXKKB7TwJDM+dfwCTuO4cPx0veLK4Zj/r7Lr88YleJW5GuE/aqwu7uIYzyf72dGHohbdkNntXxtDDdhYFqou3eTgh+KeCnYEuw6Xox4IFTn4JZeHEsv1e8JDI8D1KZg8RmD2jzJS3nlQ/LcLZoHhQsGoAIZ+4K2ROHeySRo233YIyX2Gekq7LjX61TebDurHB8hkm0tVkqO+2gC4zHRg7N/UyjI8ws2t5qrI8xkGcZQLZv0z5kLfj4y9WizRHl4z2HohROE8+lMocZNAGsgheBp/ltISRBPlXev/0+n7Wwch9sVyW+Shjbywot/sTjfSJ/yQ0LJBT88FWMRv+imwEaw+IxFer1ILAL/zSm/7dOIbKvCF7CKapj80Dn7qQJQejsGzXs7kc3PKTKIA3ST72P51x8Ca6x/Fi3xR4OQ+wNx6QnW1Nj6gW5alYtsthEA5lgOkEEuBVPzv4gO05/LAPfrfe+iLkGVYcHJUIq8grhg4cqTop1n53opXG+zRo0ijd+qD27brilXeJNtu/tomet7+iETCiHZ1Y9SF53t/Kxs1yXZBPq93A1zcO7z6PcsZdiEqZLQ25M4G5LJCqCof0b4n1oTCT/m/d3zAVs7NeIbk/lQIaevqwPVwqxBJrJqolWRa0rhPrX23v9fRS5bNAyMzfnPPM7Tbw7kLMYCwChq2YCqOJtXXkmyysAV1G5/qGF1YsKYWQt1LUAG6xEjsdngrL06meU+fy8iE4APV87l FANkKxDc AyxAhbCiDxkadhoswpkzyva8GylQ7OjEPvRQg08fNW7sujWc552XyzgTEJ6R1YZsmamRK7WVyzCZFBN8ZEzmLGgSDCfvR5+QITQz5Q4BRb/6OU2hdmWaeXSRxt81hM4Jz+E+De9gqvpO/WCyK9FjjORhkCmEbXVodRyngPO/yQ4TIIfhevjsAm7xYbphxqcXAFAPp25vWeKYvSyfVfmw6Dy3vSyVOoL8SXmJqw2NTQOE1UxvFS1RiMHjwjoGDS3xtRJJ3lHAxh+UBisL6KvAGDHHsrs6ShbEhl9SldadjGba2tNdMQ+UrkLXAJM36nY77wBcQC+H+fx3CclJjRtYUIbKYF/FGIZCUHr+VdEaL1Q30FvbsloQm8OeHJMIvujrfTq9t9XBoKLFSc9kSwBgzvxW+mbSycCGwQx6bSgwPjtONyd76W7QJnlXLaflNDlCBS/dhjtdchNNjwDsDmGUBRgsW5rGyYNAhCCS2 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 4/4/25 15:53, Petr Tesarik wrote: > On Fri, 4 Apr 2025 14:45:14 +0200 > Vlastimil Babka wrote: > >> >> https://lore.kernel.org/all/20230612153201.554742-1-catalin.marinas@arm.com/ > > I can remember this series, as well as my confusion why 192-byte > kmalloc caches were missing on arm64. > > Nevertheless, I believe ARCH_DMA_MINALIGN is required to avoid putting > a DMA buffer on the same cache line as some other data that might be > _written_ by the CPU while the corresponding main memory is modified by > another bus-mastering device. > > Consider this layout: > > ... | DMA buffer | other data | ... > ^ ^ > +-------------------------+-- cache line boundaries > > When you prepare for DMA, you make sure that the DMA buffer is not > cached by the CPU, so you flush the cache line (from all levels). Then > you tell the device to write into the DMA buffer. However, before the > device finishes the DMA transaction, the CPU accesses "other data", > loading this cache line from main memory with partial results. Worse, I'd expect loading has to be safe, somehow. Otherwise even without accessing the cache line directly (either the buffer or other data part) you may be accessing nearby cachelines, triggering a prefetch into the CPU cache. Is this handled by another flush after the DMA operation is done? In any case it doesn't affect the redzoning. > if the CPU writes to "other data", it may write the cache line back > into main memory, racing with the device writing to DMA buffer, and you > end up with corrupted data in DMA buffer. > > But redzone poisoning should happen long before the DMA buffer cache > line is flushed. The device will not overwrite it unless it was given > wrong buffer length for the transaction, but then that would be a bug > that I'd rather detect. Thanks for the explanation, it makes sense to me and thus the extended redzoning should be safe, unless someone disputes your view. Sorry for the noise! > @Catalin: I can see you're already in Cc. If I'm still missing > something, please, correct me. > > Petr T