From: Lance Yang <lance.yang@linux.dev>
To: Sean Christopherson <seanjc@google.com>
Cc: akpm@linux-foundation.org, david@kernel.org,
dave.hansen@intel.com, dave.hansen@linux.intel.com,
ypodemsk@redhat.com, hughd@google.com, will@kernel.org,
aneesh.kumar@kernel.org, npiggin@gmail.com, peterz@infradead.org,
tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
x86@kernel.org, hpa@zytor.com, arnd@arndb.de,
lorenzo.stoakes@oracle.com, ziy@nvidia.com,
baolin.wang@linux.alibaba.com, Liam.Howlett@oracle.com,
npache@redhat.com, ryan.roberts@arm.com, dev.jain@arm.com,
baohua@kernel.org, shy828301@gmail.com, riel@surriel.com,
jannh@google.com, jgross@suse.com, pbonzini@redhat.com,
boris.ostrovsky@oracle.com, virtualization@lists.linux.dev,
kvm@vger.kernel.org, linux-arch@vger.kernel.org,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
ioworker0@gmail.com
Subject: Re: [PATCH v4 3/3] x86/tlb: add architecture-specific TLB IPI optimization support
Date: Sun, 1 Mar 2026 14:56:14 +0800 [thread overview]
Message-ID: <7454cd72-3816-4a05-89f1-ded8b99acb41@linux.dev> (raw)
In-Reply-To: <aaCP95l-m8ISXF78@google.com>
On 2026/2/27 02:24, Sean Christopherson wrote:
> On Thu, Feb 26, 2026, Lance Yang wrote:
>> On 2026/2/26 04:11, Sean Christopherson wrote:
>>> On Mon, Feb 02, 2026, Lance Yang wrote:
>>>> diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
>>>> index 37dc8465e0f5..6a5e47ee4eb6 100644
>>>> --- a/arch/x86/kernel/kvm.c
>>>> +++ b/arch/x86/kernel/kvm.c
>>>> @@ -856,6 +856,12 @@ static void __init kvm_guest_init(void)
>>>> #ifdef CONFIG_SMP
>>>> if (pv_tlb_flush_supported()) {
>>>> pv_ops.mmu.flush_tlb_multi = kvm_flush_tlb_multi;
>>>> + /*
>>>> + * KVM's flush implementation calls native_flush_tlb_multi(),
>>>> + * which sends real IPIs when INVLPGB is not available.
>>>
>>> Not on all (virtual) CPUs. The entire point of KVM's PV TLB flush is to elide
>>> the IPIs. If a vCPU was scheduled out by the host, the guest sets a flag and
>>> relies on the host to flush the TLB on behalf of the guest prior to the next
>>> VM-Enter.
>>
>> Ah, I see. Thanks for the correction!
>>
>> KVM only sends IPIs to running vCPUs; preempted ones are left out of the mask
>> and flushed on VM-Enter. So the old comment was wrong ...
>>
>> IIUC, we still set the flag to true because only running vCPUs can be in a
>> software/lockless walk, and they all get the IPI, so the flush is enough.
>>
>> Does that match what you had in mind?
>
> No, because from the guest kernel's perspective, the vCPU is running. The kernel
> can't make any assumptions about what code the vCPU was executing when the vCPU
> was preempted by the host scheduler, i.e. it's entirely possible the vCPU is in
> a software/lockless walk.
Thanks a lot for setting me straight!
So any PV that has its own things and doesn't call
native_flush_tlb_multi() directly cannot be trusted to provide the IPI
guarantees we need.
So we should only set the flag for the native path, which truly calls
native_flush_tlb_multi() directly.
Have a great weekend,
Lance
next prev parent reply other threads:[~2026-03-01 6:56 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-02 7:45 [PATCH v4 0/3] targeted TLB sync IPIs for lockless page table walkers Lance Yang
2026-02-02 7:45 ` [PATCH v4 1/3] mm: use targeted IPIs for TLB sync with " Lance Yang
2026-02-02 9:42 ` Peter Zijlstra
2026-02-02 12:14 ` Lance Yang
2026-02-02 12:51 ` Peter Zijlstra
2026-02-02 13:23 ` Lance Yang
2026-02-02 13:42 ` Peter Zijlstra
2026-02-02 14:28 ` Lance Yang
2026-02-02 16:20 ` Dave Hansen
2026-02-02 7:45 ` [PATCH v4 2/3] mm: switch callers to tlb_remove_table_sync_mm() Lance Yang
2026-02-02 7:45 ` [PATCH v4 3/3] x86/tlb: add architecture-specific TLB IPI optimization support Lance Yang
2026-02-25 20:11 ` Sean Christopherson
2026-02-26 11:37 ` Lance Yang
2026-02-26 18:24 ` Sean Christopherson
2026-03-01 6:56 ` Lance Yang [this message]
2026-02-02 9:54 ` [PATCH v4 0/3] targeted TLB sync IPIs for lockless page table walkers Peter Zijlstra
2026-02-02 11:00 ` [PATCH v4 0/3] targeted TLB sync IPIs for lockless page table Lance Yang
2026-02-02 12:50 ` Peter Zijlstra
2026-02-02 12:58 ` Lance Yang
2026-02-02 13:07 ` Lance Yang
2026-02-02 13:37 ` Peter Zijlstra
2026-02-02 14:37 ` Lance Yang
2026-02-02 15:09 ` Peter Zijlstra
2026-02-02 15:52 ` Lance Yang
2026-02-05 13:25 ` David Hildenbrand (Arm)
2026-02-05 15:01 ` Lance Yang
2026-02-05 15:05 ` David Hildenbrand (Arm)
2026-02-05 15:28 ` Lance Yang
2026-02-05 15:09 ` Dave Hansen
2026-02-05 15:31 ` Lance Yang
2026-02-05 15:41 ` Dave Hansen
2026-02-05 16:30 ` Lance Yang
2026-02-05 16:46 ` David Hildenbrand (Arm)
2026-02-05 16:48 ` Matthew Wilcox
2026-02-05 17:06 ` David Hildenbrand (Arm)
2026-02-05 18:36 ` Dave Hansen
2026-02-05 22:49 ` David Hildenbrand (Arm)
2026-02-05 21:30 ` David Hildenbrand (Arm)
2026-02-05 17:00 ` Dave Hansen
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