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From: Zi Yan <ziy@nvidia.com>
To: Matthew Wilcox <willy@infradead.org>
Cc: Ryan Roberts <ryan.roberts@arm.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	David Hildenbrand <david@redhat.com>,
	Dave Chinner <david@fromorbit.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org,
	linux-mm@kvack.org
Subject: Re: [PATCH v3] mm/filemap: Allow arch to request folio size for exec memory
Date: Thu, 27 Mar 2025 20:07:23 -0400	[thread overview]
Message-ID: <731D8D6E-52A0-4144-A2BB-7243BFACC92D@nvidia.com> (raw)
In-Reply-To: <Z-WAbWfZzG1GA-4n@casper.infradead.org>

On 27 Mar 2025, at 12:44, Matthew Wilcox wrote:

> On Thu, Mar 27, 2025 at 04:06:58PM +0000, Ryan Roberts wrote:
>> So let's special-case the read(ahead) logic for executable mappings. The
>> trade-off is performance improvement (due to more efficient storage of
>> the translations in iTLB) vs potential read amplification (due to
>> reading too much data around the fault which won't be used), and the
>> latter is independent of base page size. I've chosen 64K folio size for
>> arm64 which benefits both the 4K and 16K base page size configs and
>> shouldn't lead to any read amplification in practice since the old
>> read-around path was (usually) reading blocks of 128K. I don't
>> anticipate any write amplification because text is always RO.
>
> Is there not also the potential for wasted memory due to ELF alignment?
> Kalesh talked about it in the MM BOF at the same time that Ted and I
> were discussing it in the FS BOF.  Some coordination required (like
> maybe Kalesh could have mentioned it to me rathere than assuming I'd be
> there?)
>
>> +#define arch_exec_folio_order() ilog2(SZ_64K >> PAGE_SHIFT)
>
> I don't think the "arch" really adds much value here.
>
> #define exec_folio_order()	get_order(SZ_64K)

How about AMD’s PTE coalescing, which does PTE compression at
16KB or 32KB level? It covers 4 16KB and 2 32KB, at least it will
not hurt AMD PTE coalescing. Starting with 64KB across all arch
might be simpler to see the performance impact. Just a comment,
no objection. :)

Best Regards,
Yan, Zi


  parent reply	other threads:[~2025-03-28  0:07 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-27 16:06 Ryan Roberts
2025-03-27 16:44 ` Matthew Wilcox
2025-03-27 20:23   ` Ryan Roberts
2025-03-28 19:14     ` Matthew Wilcox
2025-03-29 10:07       ` Ryan Roberts
2025-04-01  7:19         ` Kalesh Singh
2025-04-01 10:35           ` Ryan Roberts
2025-04-01 17:55             ` Kalesh Singh
2025-04-02 13:40               ` Ryan Roberts
2025-03-28  0:07   ` Zi Yan [this message]
2025-03-28 13:09     ` Ryan Roberts
2025-03-28 13:32       ` Zi Yan
2025-03-28 13:50         ` Ryan Roberts

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