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Thu, 27 Oct 2022 13:15:23 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3696.120.41.1.1\)) Subject: Re: [PATCH 01/13] mm: Update ptep_get_lockless()s comment From: Nadav Amit In-Reply-To: Date: Thu, 27 Oct 2022 13:15:22 -0700 Cc: Peter Zijlstra , Jann Horn , John Hubbard , x86@kernel.org, willy@infradead.org, Andrew Morton , linux-kernel@vger.kernel.org, linux-mm@kvack.org, Andrea Arcangeli , kirill.shutemov@linux.intel.com, jroedel@suse.de, ubizjak@gmail.com Content-Transfer-Encoding: quoted-printable Message-Id: <6C548A9A-3AF3-4EC1-B1E5-47A7FFBEB761@gmail.com> References: <20221022111403.531902164@infradead.org> <20221022114424.515572025@infradead.org> <2c800ed1-d17a-def4-39e1-09281ee78d05@nvidia.com> To: Linus Torvalds X-Mailer: Apple Mail (2.3696.120.41.1.1) ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1666901725; a=rsa-sha256; cv=none; b=yb40Rgh8cbJWebGqUW5jSzOE2jvZ2Toe78JzH+k4gU3bWeZ7wC5Osya6pNJSVje8bM2Nsp iuWEmKk9rJodlVKuMHpWpd4s4NNcqCqqe34hsT+5+tO/6+VCw74ZUDh1qoBaR2z2HNNnuH nvvwQxmMsynAfQn1/rS5LqmFUWR/W1s= ARC-Authentication-Results: i=1; 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dkim=pass header.d=gmail.com header.s=20210112 header.b=EtGLqAsr; spf=pass (imf22.hostedemail.com: domain of nadav.amit@gmail.com designates 209.85.215.169 as permitted sender) smtp.mailfrom=nadav.amit@gmail.com; dmarc=pass (policy=none) header.from=gmail.com X-HE-Tag: 1666901725-902933 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On Oct 27, 2022, at 11:13 AM, Linus Torvalds = wrote: > Anybody willing to try to write up the rules (and have each rule > document *why* it's a rule - not just "by fiat", but an actual "these > are the rules and this is *why* they are the rules"). >=20 > Because right now I think all of our rules are almost entirely just > encoded in the code, with a couple of comments, and a few people who > just remember why we do what we do. I think it might be easier to come up with new rules instead of phrasing = the existing ones. The approach I suggested before [1] is something like: 1. Turn x86=E2=80=99s TLB-generation mechanism to be generic. Turn the TLB-generation into =E2=80=9Cpending TLB-generation=E2=80=9D. 2. For each mm track =E2=80=9Ccompleted TLB-generation=E2=80=9D, = whenever an actual flush takes place. 3. When you defer a TLB-flush, while holding the PTL: a. Increase the TLB-generation. b. Save the updated =E2=80=9Ctable generation" in a new field in the page-table=E2=80=99s page-struct. 4. When you are about to rely on a PTE value that is read from a = page-table, first check if a TLB flush is needed. The check is performed by = comparing the =E2=80=9Ctable generation=E2=80=9D with the =E2=80=9Ccompleted = generation=E2=80=9D. If the =E2=80=9Ctable generation=E2=80=9D is behind, a TLB flush is needed. [ You rely on the PTE value when you install new PTEs or change them = ] That=E2=80=99s about it. I might have not covered some issues with = fast-GUP. But in general I think it is a simple scheme. The thing I like about this = scheme the most is that it avoids relying on almost all the OS data-structures (e.g., PageAnon()), making it much easier to grasp. I can revive the patch-set if the overall approach is agreeable. [1] = https://lore.kernel.org/lkml/20210131001132.3368247-1-namit@vmware.com/=